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JitCore_arm.h
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1 
2 struct vm_cpu {
3  uint32_t exception_flags;
4  uint32_t interrupt_num;
5 
6  /* gpregs */
7  uint32_t R0;
8  uint32_t R1;
9  uint32_t R2;
10  uint32_t R3;
11  uint32_t R4;
12  uint32_t R5;
13  uint32_t R6;
14  uint32_t R7;
15  uint32_t R8;
16  uint32_t R9;
17  uint32_t R10;
18  uint32_t R11;
19  uint32_t R12;
20  uint32_t SP;
21  uint32_t LR;
22  uint32_t PC;
23 
24  /* eflag */
25  uint32_t zf;
26  uint32_t nf;
27  uint32_t of;
28  uint32_t cf;
29 
30  /* ge */
31  uint32_t ge0;
32  uint32_t ge1;
33  uint32_t ge2;
34  uint32_t ge3;
35 
36  uint32_t bp_num;
37 };
38 
39 
40 _MIASM_EXPORT void dump_gpregs(struct vm_cpu* vmcpu);
41 
42 _MIASM_EXPORT void MEM_WRITE_08(JitCpu* jitcpu, uint64_t addr, uint8_t src);
43 _MIASM_EXPORT void MEM_WRITE_16(JitCpu* jitcpu, uint64_t addr, uint16_t src);
44 _MIASM_EXPORT void MEM_WRITE_32(JitCpu* jitcpu, uint64_t addr, uint32_t src);
45 _MIASM_EXPORT void MEM_WRITE_64(JitCpu* jitcpu, uint64_t addr, uint64_t src);
46 
47 #define RETURN_PC return BlockDst;
dse_crackme.found
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Definition: dse_crackme.py:270
vm_cpu::ge2
uint32_t ge2
Definition: JitCore_arm.h:33
vm_cpu::of
uint32_t of
Definition: JitCore_aarch64.h:46
MEM_WRITE_32
void MEM_WRITE_32(JitCpu *jitcpu, uint64_t addr, uint32_t src)
Definition: JitCore_arm.c:197
vm_cpu::R3
uint32_t R3
Definition: JitCore_arm.h:10
_reg_dict
Definition: JitCore.h:194
MOD_DEF
#define MOD_DEF(ob, name, doc, methods)
Definition: compat_py23.h:218
cpu_set_exception
PyObject * cpu_set_exception(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:167
cpu_set_gpreg
PyObject * cpu_set_gpreg(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:90
PyGetInt_uint32_t
#define PyGetInt_uint32_t(item, value)
Definition: compat_py23.h:194
cpu_set_interrupt_num
PyObject * cpu_set_interrupt_num(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:207
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PyObject * JitCpu_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
Definition: JitCore.c:20
vm_MEM_WRITE_32
void vm_MEM_WRITE_32(vm_mngr_t *vm_mngr, uint64_t addr, unsigned int src)
Definition: vm_mngr.c:473
vm_cpu::R6
uint32_t R6
Definition: JitCore_arm.h:13
MEM_WRITE_16
void MEM_WRITE_16(JitCpu *jitcpu, uint64_t addr, uint16_t src)
Definition: JitCore_arm.c:192
miasm.arch.arm.regs.ge2
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Definition: regs.py:75
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#define RET_MODULE
Definition: compat_py23.h:221
vm_cpu::R7
uint32_t R7
Definition: JitCore_arm.h:14
MEM_WRITE_64
_MIASM_EXPORT void MEM_WRITE_64(JitCpu *jitcpu, uint64_t addr, uint64_t src)
Definition: JitCore_aarch64.c:249
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PyObject * JitCpu_get_vmmngr(JitCpu *self, void *closure)
Definition: JitCore.c:28
modint.i
i
Definition: modint.py:70
miasm.arch.arm.regs.ge0
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Definition: regs.py:73
miasm.arch.aarch64.regs.cf
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Definition: regs.py:166
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Definition: JitCore_arm.c:435
MEM_WRITE_64
void MEM_WRITE_64(JitCpu *jitcpu, uint64_t addr, uint64_t src)
Definition: JitCore_arm.c:202
miasm.arch.aarch64.regs.zf
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Definition: regs.py:163
miasm.arch.aarch64.regs.of
of
Definition: regs.py:165
vm_cpu::R11
uint32_t R11
Definition: JitCore_arm.h:18
vm_cpu::nf
uint32_t nf
Definition: JitCore_aarch64.h:45
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#define get_reg(reg)
Definition: JitCore.h:152
vm_cpu::R8
uint32_t R8
Definition: JitCore_arm.h:15
vm_cpu::R9
uint32_t R9
Definition: JitCore_arm.h:16
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#define PyGetStr(dest, name)
Definition: compat_py23.h:181
vm_cpu::ge0
uint32_t ge0
Definition: JitCore_arm.h:31
vm_cpu::R0
uint32_t R0
Definition: JitCore_arm.h:7
vm_cpu::R4
uint32_t R4
Definition: JitCore_arm.h:11
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PyObject * cpu_get_exception(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:182
vm_MEM_WRITE_64
void vm_MEM_WRITE_64(vm_mngr_t *vm_mngr, uint64_t addr, uint64_t src)
Definition: vm_mngr.c:478
JitCpu_set_vmmngr
PyObject * JitCpu_set_vmmngr(JitCpu *self, PyObject *value, void *closure)
Definition: JitCore.c:38
miasm.arch.arm.regs.R8
list R8
Definition: regs.py:25
_reg_dict::name
char * name
Definition: JitCore.h:195
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PyObject * JitCpu_set_jitter(JitCpu *self, PyObject *value, void *closure)
Definition: JitCore.c:73
miasm.arch.arm.regs.R10
list R10
Definition: regs.py:27
miasm.arch.arm.regs.LR
list LR
Definition: regs.py:31
vm_cpu::cf
uint32_t cf
Definition: JitCore_aarch64.h:47
MEM_WRITE_32
_MIASM_EXPORT void MEM_WRITE_32(JitCpu *jitcpu, uint64_t addr, uint32_t src)
Definition: JitCore_aarch64.c:244
vm_cpu::PC
uint64_t PC
Definition: JitCore_aarch64.h:41
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#define RAISE(errtype, msg)
Definition: JitCore.h:19
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Definition: export_llvm.py:70
VmMngr
Definition: vm_mngr_py.h:8
MEM_WRITE_08
void MEM_WRITE_08(JitCpu *jitcpu, uint64_t addr, uint8_t src)
Definition: JitCore_arm.c:187
vm_cpu::ge3
uint32_t ge3
Definition: JitCore_arm.h:34
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void vm_MEM_WRITE_08(vm_mngr_t *vm_mngr, uint64_t addr, unsigned char src)
Definition: vm_mngr.c:462
vm_cpu::R10
uint32_t R10
Definition: JitCore_arm.h:17
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PyObject * JitCpu_get_jitter(JitCpu *self, void *closure)
Definition: JitCore.c:63
cpu_get_interrupt_num
PyObject * cpu_get_interrupt_num(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:222
miasm.arch.arm.regs.R2
list R2
Definition: regs.py:19
vm_MEM_WRITE_16
void vm_MEM_WRITE_16(vm_mngr_t *vm_mngr, uint64_t addr, unsigned short src)
Definition: vm_mngr.c:468
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Definition: dse_crackme.py:320
miasm.arch.arm.regs.SP
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Definition: regs.py:30
vm_cpu::zf
uint32_t zf
Definition: JitCore_aarch64.h:44
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PyObject * cpu_init_regs(JitCpu *self)
Definition: JitCore_arm.c:126
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uint32_t exception_flags
Definition: JitCore_aarch64.h:3
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#define _MIASM_EXPORT
Definition: JitCore_x86.h:6
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reg_dict gpreg_dict[]
Definition: JitCore_arm.c:16
miasm.arch.aarch64.regs.nf
nf
Definition: regs.py:164
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Definition: shellcode.py:26
miasm.arch.arm.regs.R0
list R0
Definition: regs.py:17
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void dump_gpregs(struct vm_cpu *vmcpu)
Definition: JitCore_arm.c:134
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size_t offset
Definition: JitCore.h:196
cpu_get_gpreg
PyObject * cpu_get_gpreg(JitCpu *self)
Definition: JitCore_arm.c:53
miasm.arch.arm.regs.R11
list R11
Definition: regs.py:28
MEM_WRITE_08
_MIASM_EXPORT void MEM_WRITE_08(JitCpu *jitcpu, uint64_t addr, uint8_t src)
Definition: JitCore_aarch64.c:234
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PyObject * get_gpreg_offset_all(void)
Definition: JitCore_arm.c:294
JitCore_arm.h
JitCpu::pyvm
PyObject_HEAD VmMngr * pyvm
Definition: JitCore.h:188
miasm.arch.arm.regs.R5
list R5
Definition: regs.py:22
miasm.arch.arm.regs.R9
list R9
Definition: regs.py:26
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void JitCpu_dealloc(JitCpu *self)
Definition: JitCore.c:14
miasm.arch.arm.regs.R3
list R3
Definition: regs.py:20
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Definition: regs.py:137
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Definition: dis_binary.py:24
miasm.arch.arm.regs.R1
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Definition: regs.py:18
MEM_WRITE_16
_MIASM_EXPORT void MEM_WRITE_16(JitCpu *jitcpu, uint64_t addr, uint16_t src)
Definition: JitCore_aarch64.c:239
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uint32_t ge1
Definition: JitCore_arm.h:32
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list R4
Definition: regs.py:21
vm_cpu::LR
uint64_t LR
Definition: JitCore_aarch64.h:38
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Definition: regs.py:8
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#define get_reg_off(reg)
Definition: JitCore.h:170
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Definition: simplification_tools.py:24
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Definition: JitCore_aarch64.h:39
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Definition: example_types.py:218
vm_cpu::LR
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Definition: JitCore_arm.h:21
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PyObject * cpu_dump_gpregs_with_attrib(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:160
miasm.arch.arm.regs.R6
list R6
Definition: regs.py:23
vm_cpu::R5
uint32_t R5
Definition: JitCore_arm.h:12
vm_cpu::interrupt_num
uint32_t interrupt_num
Definition: JitCore_aarch64.h:4
miasm.arch.arm.regs.R12
list R12
Definition: regs.py:29
miasm.arch.arm.regs.ge1
ge1
Definition: regs.py:74
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uint32_t R2
Definition: JitCore_arm.h:9
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getset_reg_u32(R0)
miasm.arch.arm.regs.ge3
ge3
Definition: regs.py:76
dump_gpregs
_MIASM_EXPORT void dump_gpregs(struct vm_cpu *vmcpu)
Definition: JitCore_aarch64.c:170
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Definition: regs.py:7
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Definition: JitCore.h:186
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Definition: JitCore_aarch64.h:2
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Definition: JitCore_arm.h:8
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PyObject * cpu_dump_gpregs(JitCpu *self, PyObject *args)
Definition: JitCore_arm.c:149
vm_cpu::R12
uint32_t R12
Definition: JitCore_arm.h:19
vm_cpu::bp_num
uint32_t bp_num
Definition: JitCore_arm.h:36
miasm.arch.arm.regs.R7
list R7
Definition: regs.py:24