miasm
Reverse engineering framework
vm_cpu Struct Reference

#include <JitCore_aarch64.h>

Collaboration diagram for vm_cpu:

Public Attributes

uint32_t exception_flags
 
uint32_t interrupt_num
 
uint64_t X0
 
uint64_t X1
 
uint64_t X2
 
uint64_t X3
 
uint64_t X4
 
uint64_t X5
 
uint64_t X6
 
uint64_t X7
 
uint64_t X8
 
uint64_t X9
 
uint64_t X10
 
uint64_t X11
 
uint64_t X12
 
uint64_t X13
 
uint64_t X14
 
uint64_t X15
 
uint64_t X16
 
uint64_t X17
 
uint64_t X18
 
uint64_t X19
 
uint64_t X20
 
uint64_t X21
 
uint64_t X22
 
uint64_t X23
 
uint64_t X24
 
uint64_t X25
 
uint64_t X26
 
uint64_t X27
 
uint64_t X28
 
uint64_t X29
 
uint64_t LR
 
uint64_t SP
 
uint64_t PC
 
uint32_t zf
 
uint32_t nf
 
uint32_t of
 
uint32_t cf
 
uint32_t R0
 
uint32_t R1
 
uint32_t R2
 
uint32_t R3
 
uint32_t R4
 
uint32_t R5
 
uint32_t R6
 
uint32_t R7
 
uint32_t R8
 
uint32_t R9
 
uint32_t R10
 
uint32_t R11
 
uint32_t R12
 
uint32_t SP
 
uint32_t LR
 
uint32_t PC
 
uint32_t ge0
 
uint32_t ge1
 
uint32_t ge2
 
uint32_t ge3
 
uint32_t bp_num
 
uint32_t TP
 
uint32_t GP
 
uint32_t LP
 
uint32_t SAR
 
uint32_t S3
 
uint32_t RPB
 
uint32_t RPE
 
uint32_t RPC
 
uint32_t HI
 
uint32_t LO
 
uint32_t S9
 
uint32_t S10
 
uint32_t S11
 
uint32_t MB0
 
uint32_t ME0
 
uint32_t MB1
 
uint32_t ME1
 
uint32_t PSW
 
uint32_t ID
 
uint32_t TMP
 
uint32_t EPC
 
uint32_t EXC
 
uint32_t CFG
 
uint32_t S22
 
uint32_t NPC
 
uint32_t DBG
 
uint32_t DEPC
 
uint32_t OPT
 
uint32_t RCFG
 
uint32_t CCFG
 
uint32_t S29
 
uint32_t S30
 
uint32_t S31
 
uint32_t S32
 
uint32_t PC_end
 
uint32_t RPE_instr_count
 
uint32_t RPC_current
 
uint32_t take_jmp
 
uint32_t last_addr
 
uint32_t is_repeat_end
 
uint32_t in_erepeat
 
uint32_t ZERO
 
uint32_t AT
 
uint32_t V0
 
uint32_t V1
 
uint32_t A0
 
uint32_t A1
 
uint32_t A2
 
uint32_t A3
 
uint32_t T0
 
uint32_t T1
 
uint32_t T2
 
uint32_t T3
 
uint32_t T4
 
uint32_t T5
 
uint32_t T6
 
uint32_t T7
 
uint32_t S0
 
uint32_t S1
 
uint32_t S2
 
uint32_t S4
 
uint32_t S5
 
uint32_t S6
 
uint32_t S7
 
uint32_t T8
 
uint32_t T9
 
uint32_t K0
 
uint32_t K1
 
uint32_t FP
 
uint32_t RA
 
uint32_t PC_FETCH
 
uint32_t R_LO
 
uint32_t R_HI
 
double F0
 
double F1
 
double F2
 
double F3
 
double F4
 
double F5
 
double F6
 
double F7
 
double F8
 
double F9
 
double F10
 
double F11
 
double F12
 
double F13
 
double F14
 
double F15
 
double F16
 
double F17
 
double F18
 
double F19
 
double F20
 
double F21
 
double F22
 
double F23
 
double F24
 
double F25
 
double F26
 
double F27
 
double F28
 
double F29
 
double F30
 
double F31
 
uint32_t INDEX
 
uint32_t CPR0_1
 
uint32_t CPR0_2
 
uint32_t CPR0_3
 
uint32_t CPR0_4
 
uint32_t CPR0_5
 
uint32_t CPR0_6
 
uint32_t CPR0_7
 
uint32_t RANDOM
 
uint32_t CPR0_9
 
uint32_t CPR0_10
 
uint32_t CPR0_11
 
uint32_t CPR0_12
 
uint32_t CPR0_13
 
uint32_t CPR0_14
 
uint32_t CPR0_15
 
uint32_t ENTRYLO0
 
uint32_t CPR0_17
 
uint32_t CPR0_18
 
uint32_t CPR0_19
 
uint32_t CPR0_20
 
uint32_t CPR0_21
 
uint32_t CPR0_22
 
uint32_t CPR0_23
 
uint32_t ENTRYLO1
 
uint32_t CPR0_25
 
uint32_t CPR0_26
 
uint32_t CPR0_27
 
uint32_t CPR0_28
 
uint32_t CPR0_29
 
uint32_t CPR0_30
 
uint32_t CPR0_31
 
uint32_t CONTEXT
 
uint32_t CONTEXTCONFIG
 
uint32_t CPR0_34
 
uint32_t CPR0_35
 
uint32_t CPR0_36
 
uint32_t CPR0_37
 
uint32_t CPR0_38
 
uint32_t CPR0_39
 
uint32_t PAGEMASK
 
uint32_t PAGEGRAIN
 
uint32_t SEGCTL0
 
uint32_t SEGCTL1
 
uint32_t SEGCTL2
 
uint32_t PWBASE
 
uint32_t PWFIELD
 
uint32_t PWSIZE
 
uint32_t WIRED
 
uint32_t CPR0_49
 
uint32_t CPR0_50
 
uint32_t CPR0_51
 
uint32_t CPR0_52
 
uint32_t CPR0_53
 
uint32_t PWCTL
 
uint32_t CPR0_55
 
uint32_t CPR0_56
 
uint32_t CPR0_57
 
uint32_t CPR0_58
 
uint32_t CPR0_59
 
uint32_t CPR0_60
 
uint32_t CPR0_61
 
uint32_t CPR0_62
 
uint32_t CPR0_63
 
uint32_t BADVADDR
 
uint32_t BADINSTR
 
uint32_t BADINSTRP
 
uint32_t CPR0_67
 
uint32_t CPR0_68
 
uint32_t CPR0_69
 
uint32_t CPR0_70
 
uint32_t CPR0_71
 
uint32_t COUNT
 
uint32_t CPR0_73
 
uint32_t CPR0_74
 
uint32_t CPR0_75
 
uint32_t CPR0_76
 
uint32_t CPR0_77
 
uint32_t CPR0_78
 
uint32_t CPR0_79
 
uint32_t ENTRYHI
 
uint32_t CPR0_81
 
uint32_t CPR0_82
 
uint32_t CPR0_83
 
uint32_t CPR0_84
 
uint32_t CPR0_85
 
uint32_t CPR0_86
 
uint32_t CPR0_87
 
uint32_t CPR0_88
 
uint32_t CPR0_89
 
uint32_t CPR0_90
 
uint32_t CPR0_91
 
uint32_t CPR0_92
 
uint32_t CPR0_93
 
uint32_t CPR0_94
 
uint32_t CPR0_95
 
uint32_t CPR0_96
 
uint32_t CPR0_97
 
uint32_t CPR0_98
 
uint32_t CPR0_99
 
uint32_t CPR0_100
 
uint32_t CPR0_101
 
uint32_t CPR0_102
 
uint32_t CPR0_103
 
uint32_t CAUSE
 
uint32_t CPR0_105
 
uint32_t CPR0_106
 
uint32_t CPR0_107
 
uint32_t CPR0_108
 
uint32_t CPR0_109
 
uint32_t CPR0_110
 
uint32_t CPR0_111
 
uint32_t CPR0_113
 
uint32_t CPR0_114
 
uint32_t CPR0_115
 
uint32_t CPR0_116
 
uint32_t CPR0_117
 
uint32_t CPR0_118
 
uint32_t CPR0_119
 
uint32_t PRID
 
uint32_t EBASE
 
uint32_t CPR0_122
 
uint32_t CPR0_123
 
uint32_t CPR0_124
 
uint32_t CPR0_125
 
uint32_t CPR0_126
 
uint32_t CPR0_127
 
uint32_t CONFIG
 
uint32_t CONFIG1
 
uint32_t CONFIG2
 
uint32_t CONFIG3
 
uint32_t CONFIG4
 
uint32_t CONFIG5
 
uint32_t CPR0_134
 
uint32_t CPR0_135
 
uint32_t CPR0_136
 
uint32_t CPR0_137
 
uint32_t CPR0_138
 
uint32_t CPR0_139
 
uint32_t CPR0_140
 
uint32_t CPR0_141
 
uint32_t CPR0_142
 
uint32_t CPR0_143
 
uint32_t CPR0_144
 
uint32_t CPR0_145
 
uint32_t CPR0_146
 
uint32_t CPR0_147
 
uint32_t CPR0_148
 
uint32_t CPR0_149
 
uint32_t CPR0_150
 
uint32_t CPR0_151
 
uint32_t WATCHHI
 
uint32_t CPR0_153
 
uint32_t CPR0_154
 
uint32_t CPR0_155
 
uint32_t CPR0_156
 
uint32_t CPR0_157
 
uint32_t CPR0_158
 
uint32_t CPR0_159
 
uint32_t CPR0_160
 
uint32_t CPR0_161
 
uint32_t CPR0_162
 
uint32_t CPR0_163
 
uint32_t CPR0_164
 
uint32_t CPR0_165
 
uint32_t CPR0_166
 
uint32_t CPR0_167
 
uint32_t CPR0_168
 
uint32_t CPR0_169
 
uint32_t CPR0_170
 
uint32_t CPR0_171
 
uint32_t CPR0_172
 
uint32_t CPR0_173
 
uint32_t CPR0_174
 
uint32_t CPR0_175
 
uint32_t CPR0_176
 
uint32_t CPR0_177
 
uint32_t CPR0_178
 
uint32_t CPR0_179
 
uint32_t CPR0_180
 
uint32_t CPR0_181
 
uint32_t CPR0_182
 
uint32_t CPR0_183
 
uint32_t CPR0_184
 
uint32_t CPR0_185
 
uint32_t CPR0_186
 
uint32_t CPR0_187
 
uint32_t CPR0_188
 
uint32_t CPR0_189
 
uint32_t CPR0_190
 
uint32_t CPR0_191
 
uint32_t CPR0_192
 
uint32_t CPR0_193
 
uint32_t CPR0_194
 
uint32_t CPR0_195
 
uint32_t CPR0_196
 
uint32_t CPR0_197
 
uint32_t CPR0_198
 
uint32_t CPR0_199
 
uint32_t CPR0_200
 
uint32_t CPR0_201
 
uint32_t CPR0_202
 
uint32_t CPR0_203
 
uint32_t CPR0_204
 
uint32_t CPR0_205
 
uint32_t CPR0_206
 
uint32_t CPR0_207
 
uint32_t CPR0_208
 
uint32_t CPR0_209
 
uint32_t CPR0_210
 
uint32_t CPR0_211
 
uint32_t CPR0_212
 
uint32_t CPR0_213
 
uint32_t CPR0_214
 
uint32_t CPR0_215
 
uint32_t CPR0_216
 
uint32_t CPR0_217
 
uint32_t CPR0_218
 
uint32_t CPR0_219
 
uint32_t CPR0_220
 
uint32_t CPR0_221
 
uint32_t CPR0_222
 
uint32_t CPR0_223
 
uint32_t CPR0_224
 
uint32_t CPR0_225
 
uint32_t CPR0_226
 
uint32_t CPR0_227
 
uint32_t CPR0_228
 
uint32_t CPR0_229
 
uint32_t CPR0_230
 
uint32_t CPR0_231
 
uint32_t CPR0_232
 
uint32_t CPR0_233
 
uint32_t CPR0_234
 
uint32_t CPR0_235
 
uint32_t CPR0_236
 
uint32_t CPR0_237
 
uint32_t CPR0_238
 
uint32_t CPR0_239
 
uint32_t CPR0_240
 
uint32_t CPR0_241
 
uint32_t CPR0_242
 
uint32_t CPR0_243
 
uint32_t CPR0_244
 
uint32_t CPR0_245
 
uint32_t CPR0_246
 
uint32_t CPR0_247
 
uint32_t CPR0_248
 
uint32_t CPR0_249
 
uint32_t KSCRATCH0
 
uint32_t KSCRATCH1
 
uint32_t KSCRATCH2
 
uint32_t KSCRATCH3
 
uint32_t KSCRATCH4
 
uint32_t KSCRATCH5
 
uint32_t R13
 
uint32_t R14
 
uint32_t R15
 
uint32_t cpuoff
 
uint32_t gie
 
uint32_t osc
 
uint32_t scg0
 
uint32_t scg1
 
uint32_t res
 
uint64_t exception_flags
 
uint32_t spr_access
 
uint32_t reserve
 
uint32_t reserve_address
 
uint64_t RAX
 
uint64_t RBX
 
uint64_t RCX
 
uint64_t RDX
 
uint64_t RSI
 
uint64_t RDI
 
uint64_t RSP
 
uint64_t RBP
 
uint64_t R8
 
uint64_t R9
 
uint64_t R10
 
uint64_t R11
 
uint64_t R12
 
uint64_t R13
 
uint64_t R14
 
uint64_t R15
 
uint64_t RIP
 
uint8_t zf
 
uint8_t nf
 
uint8_t pf
 
uint8_t of
 
uint8_t cf
 
uint8_t af
 
uint8_t df
 
uint8_t tf
 
uint8_t i_f
 
uint8_t iopl_f
 
uint8_t nt
 
uint8_t rf
 
uint8_t vm
 
uint8_t ac
 
uint8_t vif
 
uint8_t vip
 
uint8_t i_d
 
bn_t my_tick
 
bn_t cond
 
uint64_t float_st0
 
uint64_t float_st1
 
uint64_t float_st2
 
uint64_t float_st3
 
uint64_t float_st4
 
uint64_t float_st5
 
uint64_t float_st6
 
uint64_t float_st7
 
unsigned int float_c0
 
unsigned int float_c1
 
unsigned int float_c2
 
unsigned int float_c3
 
unsigned int float_stack_ptr
 
unsigned int reg_float_control
 
unsigned int reg_float_eip
 
unsigned int reg_float_cs
 
unsigned int reg_float_address
 
unsigned int reg_float_ds
 
uint64_t tsc
 
uint16_t ES
 
uint16_t CS
 
uint16_t SS
 
uint16_t DS
 
uint16_t FS
 
uint16_t GS
 
unsigned int cr0
 
unsigned int cr3
 
uint64_t MM0
 
uint64_t MM1
 
uint64_t MM2
 
uint64_t MM3
 
uint64_t MM4
 
uint64_t MM5
 
uint64_t MM6
 
uint64_t MM7
 
bn_t XMM0
 
bn_t XMM1
 
bn_t XMM2
 
bn_t XMM3
 
bn_t XMM4
 
bn_t XMM5
 
bn_t XMM6
 
bn_t XMM7
 
bn_t XMM8
 
bn_t XMM9
 
bn_t XMM10
 
bn_t XMM11
 
bn_t XMM12
 
bn_t XMM13
 
bn_t XMM14
 
bn_t XMM15
 
uint64_t segm_base [0x10000]
 

Member Data Documentation

◆ A0

uint32_t vm_cpu::A0

◆ A1

uint32_t vm_cpu::A1

◆ A2

uint32_t vm_cpu::A2

◆ A3

uint32_t vm_cpu::A3

◆ ac

uint8_t vm_cpu::ac

◆ af

uint8_t vm_cpu::af

◆ AT

uint32_t vm_cpu::AT

◆ BADINSTR

uint32_t vm_cpu::BADINSTR

◆ BADINSTRP

uint32_t vm_cpu::BADINSTRP

◆ BADVADDR

uint32_t vm_cpu::BADVADDR

◆ bp_num

uint32_t vm_cpu::bp_num

◆ CAUSE

uint32_t vm_cpu::CAUSE

◆ CCFG

uint32_t vm_cpu::CCFG

◆ cf [1/2]

uint32_t vm_cpu::cf

◆ cf [2/2]

uint8_t vm_cpu::cf

◆ CFG

uint32_t vm_cpu::CFG

◆ cond

bn_t vm_cpu::cond

◆ CONFIG

uint32_t vm_cpu::CONFIG

◆ CONFIG1

uint32_t vm_cpu::CONFIG1

◆ CONFIG2

uint32_t vm_cpu::CONFIG2

◆ CONFIG3

uint32_t vm_cpu::CONFIG3

◆ CONFIG4

uint32_t vm_cpu::CONFIG4

◆ CONFIG5

uint32_t vm_cpu::CONFIG5

◆ CONTEXT

uint32_t vm_cpu::CONTEXT

◆ CONTEXTCONFIG

uint32_t vm_cpu::CONTEXTCONFIG

◆ COUNT

uint32_t vm_cpu::COUNT

◆ CPR0_1

uint32_t vm_cpu::CPR0_1

◆ CPR0_10

uint32_t vm_cpu::CPR0_10

◆ CPR0_100

uint32_t vm_cpu::CPR0_100

◆ CPR0_101

uint32_t vm_cpu::CPR0_101

◆ CPR0_102

uint32_t vm_cpu::CPR0_102

◆ CPR0_103

uint32_t vm_cpu::CPR0_103

◆ CPR0_105

uint32_t vm_cpu::CPR0_105

◆ CPR0_106

uint32_t vm_cpu::CPR0_106

◆ CPR0_107

uint32_t vm_cpu::CPR0_107

◆ CPR0_108

uint32_t vm_cpu::CPR0_108

◆ CPR0_109

uint32_t vm_cpu::CPR0_109

◆ CPR0_11

uint32_t vm_cpu::CPR0_11

◆ CPR0_110

uint32_t vm_cpu::CPR0_110

◆ CPR0_111

uint32_t vm_cpu::CPR0_111

◆ CPR0_113

uint32_t vm_cpu::CPR0_113

◆ CPR0_114

uint32_t vm_cpu::CPR0_114

◆ CPR0_115

uint32_t vm_cpu::CPR0_115

◆ CPR0_116

uint32_t vm_cpu::CPR0_116

◆ CPR0_117

uint32_t vm_cpu::CPR0_117

◆ CPR0_118

uint32_t vm_cpu::CPR0_118

◆ CPR0_119

uint32_t vm_cpu::CPR0_119

◆ CPR0_12

uint32_t vm_cpu::CPR0_12

◆ CPR0_122

uint32_t vm_cpu::CPR0_122

◆ CPR0_123

uint32_t vm_cpu::CPR0_123

◆ CPR0_124

uint32_t vm_cpu::CPR0_124

◆ CPR0_125

uint32_t vm_cpu::CPR0_125

◆ CPR0_126

uint32_t vm_cpu::CPR0_126

◆ CPR0_127

uint32_t vm_cpu::CPR0_127

◆ CPR0_13

uint32_t vm_cpu::CPR0_13

◆ CPR0_134

uint32_t vm_cpu::CPR0_134

◆ CPR0_135

uint32_t vm_cpu::CPR0_135

◆ CPR0_136

uint32_t vm_cpu::CPR0_136

◆ CPR0_137

uint32_t vm_cpu::CPR0_137

◆ CPR0_138

uint32_t vm_cpu::CPR0_138

◆ CPR0_139

uint32_t vm_cpu::CPR0_139

◆ CPR0_14

uint32_t vm_cpu::CPR0_14

◆ CPR0_140

uint32_t vm_cpu::CPR0_140

◆ CPR0_141

uint32_t vm_cpu::CPR0_141

◆ CPR0_142

uint32_t vm_cpu::CPR0_142

◆ CPR0_143

uint32_t vm_cpu::CPR0_143

◆ CPR0_144

uint32_t vm_cpu::CPR0_144

◆ CPR0_145

uint32_t vm_cpu::CPR0_145

◆ CPR0_146

uint32_t vm_cpu::CPR0_146

◆ CPR0_147

uint32_t vm_cpu::CPR0_147

◆ CPR0_148

uint32_t vm_cpu::CPR0_148

◆ CPR0_149

uint32_t vm_cpu::CPR0_149

◆ CPR0_15

uint32_t vm_cpu::CPR0_15

◆ CPR0_150

uint32_t vm_cpu::CPR0_150

◆ CPR0_151

uint32_t vm_cpu::CPR0_151

◆ CPR0_153

uint32_t vm_cpu::CPR0_153

◆ CPR0_154

uint32_t vm_cpu::CPR0_154

◆ CPR0_155

uint32_t vm_cpu::CPR0_155

◆ CPR0_156

uint32_t vm_cpu::CPR0_156

◆ CPR0_157

uint32_t vm_cpu::CPR0_157

◆ CPR0_158

uint32_t vm_cpu::CPR0_158

◆ CPR0_159

uint32_t vm_cpu::CPR0_159

◆ CPR0_160

uint32_t vm_cpu::CPR0_160

◆ CPR0_161

uint32_t vm_cpu::CPR0_161

◆ CPR0_162

uint32_t vm_cpu::CPR0_162

◆ CPR0_163

uint32_t vm_cpu::CPR0_163

◆ CPR0_164

uint32_t vm_cpu::CPR0_164

◆ CPR0_165

uint32_t vm_cpu::CPR0_165

◆ CPR0_166

uint32_t vm_cpu::CPR0_166

◆ CPR0_167

uint32_t vm_cpu::CPR0_167

◆ CPR0_168

uint32_t vm_cpu::CPR0_168

◆ CPR0_169

uint32_t vm_cpu::CPR0_169

◆ CPR0_17

uint32_t vm_cpu::CPR0_17

◆ CPR0_170

uint32_t vm_cpu::CPR0_170

◆ CPR0_171

uint32_t vm_cpu::CPR0_171

◆ CPR0_172

uint32_t vm_cpu::CPR0_172

◆ CPR0_173

uint32_t vm_cpu::CPR0_173

◆ CPR0_174

uint32_t vm_cpu::CPR0_174

◆ CPR0_175

uint32_t vm_cpu::CPR0_175

◆ CPR0_176

uint32_t vm_cpu::CPR0_176

◆ CPR0_177

uint32_t vm_cpu::CPR0_177

◆ CPR0_178

uint32_t vm_cpu::CPR0_178

◆ CPR0_179

uint32_t vm_cpu::CPR0_179

◆ CPR0_18

uint32_t vm_cpu::CPR0_18

◆ CPR0_180

uint32_t vm_cpu::CPR0_180

◆ CPR0_181

uint32_t vm_cpu::CPR0_181

◆ CPR0_182

uint32_t vm_cpu::CPR0_182

◆ CPR0_183

uint32_t vm_cpu::CPR0_183

◆ CPR0_184

uint32_t vm_cpu::CPR0_184

◆ CPR0_185

uint32_t vm_cpu::CPR0_185

◆ CPR0_186

uint32_t vm_cpu::CPR0_186

◆ CPR0_187

uint32_t vm_cpu::CPR0_187

◆ CPR0_188

uint32_t vm_cpu::CPR0_188

◆ CPR0_189

uint32_t vm_cpu::CPR0_189

◆ CPR0_19

uint32_t vm_cpu::CPR0_19

◆ CPR0_190

uint32_t vm_cpu::CPR0_190

◆ CPR0_191

uint32_t vm_cpu::CPR0_191

◆ CPR0_192

uint32_t vm_cpu::CPR0_192

◆ CPR0_193

uint32_t vm_cpu::CPR0_193

◆ CPR0_194

uint32_t vm_cpu::CPR0_194

◆ CPR0_195

uint32_t vm_cpu::CPR0_195

◆ CPR0_196

uint32_t vm_cpu::CPR0_196

◆ CPR0_197

uint32_t vm_cpu::CPR0_197

◆ CPR0_198

uint32_t vm_cpu::CPR0_198

◆ CPR0_199

uint32_t vm_cpu::CPR0_199

◆ CPR0_2

uint32_t vm_cpu::CPR0_2

◆ CPR0_20

uint32_t vm_cpu::CPR0_20

◆ CPR0_200

uint32_t vm_cpu::CPR0_200

◆ CPR0_201

uint32_t vm_cpu::CPR0_201

◆ CPR0_202

uint32_t vm_cpu::CPR0_202

◆ CPR0_203

uint32_t vm_cpu::CPR0_203

◆ CPR0_204

uint32_t vm_cpu::CPR0_204

◆ CPR0_205

uint32_t vm_cpu::CPR0_205

◆ CPR0_206

uint32_t vm_cpu::CPR0_206

◆ CPR0_207

uint32_t vm_cpu::CPR0_207

◆ CPR0_208

uint32_t vm_cpu::CPR0_208

◆ CPR0_209

uint32_t vm_cpu::CPR0_209

◆ CPR0_21

uint32_t vm_cpu::CPR0_21

◆ CPR0_210

uint32_t vm_cpu::CPR0_210

◆ CPR0_211

uint32_t vm_cpu::CPR0_211

◆ CPR0_212

uint32_t vm_cpu::CPR0_212

◆ CPR0_213

uint32_t vm_cpu::CPR0_213

◆ CPR0_214

uint32_t vm_cpu::CPR0_214

◆ CPR0_215

uint32_t vm_cpu::CPR0_215

◆ CPR0_216

uint32_t vm_cpu::CPR0_216

◆ CPR0_217

uint32_t vm_cpu::CPR0_217

◆ CPR0_218

uint32_t vm_cpu::CPR0_218

◆ CPR0_219

uint32_t vm_cpu::CPR0_219

◆ CPR0_22

uint32_t vm_cpu::CPR0_22

◆ CPR0_220

uint32_t vm_cpu::CPR0_220

◆ CPR0_221

uint32_t vm_cpu::CPR0_221

◆ CPR0_222

uint32_t vm_cpu::CPR0_222

◆ CPR0_223

uint32_t vm_cpu::CPR0_223

◆ CPR0_224

uint32_t vm_cpu::CPR0_224

◆ CPR0_225

uint32_t vm_cpu::CPR0_225

◆ CPR0_226

uint32_t vm_cpu::CPR0_226

◆ CPR0_227

uint32_t vm_cpu::CPR0_227

◆ CPR0_228

uint32_t vm_cpu::CPR0_228

◆ CPR0_229

uint32_t vm_cpu::CPR0_229

◆ CPR0_23

uint32_t vm_cpu::CPR0_23

◆ CPR0_230

uint32_t vm_cpu::CPR0_230

◆ CPR0_231

uint32_t vm_cpu::CPR0_231

◆ CPR0_232

uint32_t vm_cpu::CPR0_232

◆ CPR0_233

uint32_t vm_cpu::CPR0_233

◆ CPR0_234

uint32_t vm_cpu::CPR0_234

◆ CPR0_235

uint32_t vm_cpu::CPR0_235

◆ CPR0_236

uint32_t vm_cpu::CPR0_236

◆ CPR0_237

uint32_t vm_cpu::CPR0_237

◆ CPR0_238

uint32_t vm_cpu::CPR0_238

◆ CPR0_239

uint32_t vm_cpu::CPR0_239

◆ CPR0_240

uint32_t vm_cpu::CPR0_240

◆ CPR0_241

uint32_t vm_cpu::CPR0_241

◆ CPR0_242

uint32_t vm_cpu::CPR0_242

◆ CPR0_243

uint32_t vm_cpu::CPR0_243

◆ CPR0_244

uint32_t vm_cpu::CPR0_244

◆ CPR0_245

uint32_t vm_cpu::CPR0_245

◆ CPR0_246

uint32_t vm_cpu::CPR0_246

◆ CPR0_247

uint32_t vm_cpu::CPR0_247

◆ CPR0_248

uint32_t vm_cpu::CPR0_248

◆ CPR0_249

uint32_t vm_cpu::CPR0_249

◆ CPR0_25

uint32_t vm_cpu::CPR0_25

◆ CPR0_26

uint32_t vm_cpu::CPR0_26

◆ CPR0_27

uint32_t vm_cpu::CPR0_27

◆ CPR0_28

uint32_t vm_cpu::CPR0_28

◆ CPR0_29

uint32_t vm_cpu::CPR0_29

◆ CPR0_3

uint32_t vm_cpu::CPR0_3

◆ CPR0_30

uint32_t vm_cpu::CPR0_30

◆ CPR0_31

uint32_t vm_cpu::CPR0_31

◆ CPR0_34

uint32_t vm_cpu::CPR0_34

◆ CPR0_35

uint32_t vm_cpu::CPR0_35

◆ CPR0_36

uint32_t vm_cpu::CPR0_36

◆ CPR0_37

uint32_t vm_cpu::CPR0_37

◆ CPR0_38

uint32_t vm_cpu::CPR0_38

◆ CPR0_39

uint32_t vm_cpu::CPR0_39

◆ CPR0_4

uint32_t vm_cpu::CPR0_4

◆ CPR0_49

uint32_t vm_cpu::CPR0_49

◆ CPR0_5

uint32_t vm_cpu::CPR0_5

◆ CPR0_50

uint32_t vm_cpu::CPR0_50

◆ CPR0_51

uint32_t vm_cpu::CPR0_51

◆ CPR0_52

uint32_t vm_cpu::CPR0_52

◆ CPR0_53

uint32_t vm_cpu::CPR0_53

◆ CPR0_55

uint32_t vm_cpu::CPR0_55

◆ CPR0_56

uint32_t vm_cpu::CPR0_56

◆ CPR0_57

uint32_t vm_cpu::CPR0_57

◆ CPR0_58

uint32_t vm_cpu::CPR0_58

◆ CPR0_59

uint32_t vm_cpu::CPR0_59

◆ CPR0_6

uint32_t vm_cpu::CPR0_6

◆ CPR0_60

uint32_t vm_cpu::CPR0_60

◆ CPR0_61

uint32_t vm_cpu::CPR0_61

◆ CPR0_62

uint32_t vm_cpu::CPR0_62

◆ CPR0_63

uint32_t vm_cpu::CPR0_63

◆ CPR0_67

uint32_t vm_cpu::CPR0_67

◆ CPR0_68

uint32_t vm_cpu::CPR0_68

◆ CPR0_69

uint32_t vm_cpu::CPR0_69

◆ CPR0_7

uint32_t vm_cpu::CPR0_7

◆ CPR0_70

uint32_t vm_cpu::CPR0_70

◆ CPR0_71

uint32_t vm_cpu::CPR0_71

◆ CPR0_73

uint32_t vm_cpu::CPR0_73

◆ CPR0_74

uint32_t vm_cpu::CPR0_74

◆ CPR0_75

uint32_t vm_cpu::CPR0_75

◆ CPR0_76

uint32_t vm_cpu::CPR0_76

◆ CPR0_77

uint32_t vm_cpu::CPR0_77

◆ CPR0_78

uint32_t vm_cpu::CPR0_78

◆ CPR0_79

uint32_t vm_cpu::CPR0_79

◆ CPR0_81

uint32_t vm_cpu::CPR0_81

◆ CPR0_82

uint32_t vm_cpu::CPR0_82

◆ CPR0_83

uint32_t vm_cpu::CPR0_83

◆ CPR0_84

uint32_t vm_cpu::CPR0_84

◆ CPR0_85

uint32_t vm_cpu::CPR0_85

◆ CPR0_86

uint32_t vm_cpu::CPR0_86

◆ CPR0_87

uint32_t vm_cpu::CPR0_87

◆ CPR0_88

uint32_t vm_cpu::CPR0_88

◆ CPR0_89

uint32_t vm_cpu::CPR0_89

◆ CPR0_9

uint32_t vm_cpu::CPR0_9

◆ CPR0_90

uint32_t vm_cpu::CPR0_90

◆ CPR0_91

uint32_t vm_cpu::CPR0_91

◆ CPR0_92

uint32_t vm_cpu::CPR0_92

◆ CPR0_93

uint32_t vm_cpu::CPR0_93

◆ CPR0_94

uint32_t vm_cpu::CPR0_94

◆ CPR0_95

uint32_t vm_cpu::CPR0_95

◆ CPR0_96

uint32_t vm_cpu::CPR0_96

◆ CPR0_97

uint32_t vm_cpu::CPR0_97

◆ CPR0_98

uint32_t vm_cpu::CPR0_98

◆ CPR0_99

uint32_t vm_cpu::CPR0_99

◆ cpuoff

uint32_t vm_cpu::cpuoff

◆ cr0

unsigned int vm_cpu::cr0

◆ cr3

unsigned int vm_cpu::cr3

◆ CS

uint16_t vm_cpu::CS

◆ DBG

uint32_t vm_cpu::DBG

◆ DEPC

uint32_t vm_cpu::DEPC

◆ df

uint8_t vm_cpu::df

◆ DS

uint16_t vm_cpu::DS

◆ EBASE

uint32_t vm_cpu::EBASE

◆ ENTRYHI

uint32_t vm_cpu::ENTRYHI

◆ ENTRYLO0

uint32_t vm_cpu::ENTRYLO0

◆ ENTRYLO1

uint32_t vm_cpu::ENTRYLO1

◆ EPC

uint32_t vm_cpu::EPC

◆ ES

uint16_t vm_cpu::ES

◆ EXC

uint32_t vm_cpu::EXC

◆ exception_flags [1/2]

uint32_t vm_cpu::exception_flags

◆ exception_flags [2/2]

uint64_t vm_cpu::exception_flags

◆ F0

double vm_cpu::F0

◆ F1

double vm_cpu::F1

◆ F10

double vm_cpu::F10

◆ F11

double vm_cpu::F11

◆ F12

double vm_cpu::F12

◆ F13

double vm_cpu::F13

◆ F14

double vm_cpu::F14

◆ F15

double vm_cpu::F15

◆ F16

double vm_cpu::F16

◆ F17

double vm_cpu::F17

◆ F18

double vm_cpu::F18

◆ F19

double vm_cpu::F19

◆ F2

double vm_cpu::F2

◆ F20

double vm_cpu::F20

◆ F21

double vm_cpu::F21

◆ F22

double vm_cpu::F22

◆ F23

double vm_cpu::F23

◆ F24

double vm_cpu::F24

◆ F25

double vm_cpu::F25

◆ F26

double vm_cpu::F26

◆ F27

double vm_cpu::F27

◆ F28

double vm_cpu::F28

◆ F29

double vm_cpu::F29

◆ F3

double vm_cpu::F3

◆ F30

double vm_cpu::F30

◆ F31

double vm_cpu::F31

◆ F4

double vm_cpu::F4

◆ F5

double vm_cpu::F5

◆ F6

double vm_cpu::F6

◆ F7

double vm_cpu::F7

◆ F8

double vm_cpu::F8

◆ F9

double vm_cpu::F9

◆ float_c0

unsigned int vm_cpu::float_c0

◆ float_c1

unsigned int vm_cpu::float_c1

◆ float_c2

unsigned int vm_cpu::float_c2

◆ float_c3

unsigned int vm_cpu::float_c3

◆ float_st0

uint64_t vm_cpu::float_st0

◆ float_st1

uint64_t vm_cpu::float_st1

◆ float_st2

uint64_t vm_cpu::float_st2

◆ float_st3

uint64_t vm_cpu::float_st3

◆ float_st4

uint64_t vm_cpu::float_st4

◆ float_st5

uint64_t vm_cpu::float_st5

◆ float_st6

uint64_t vm_cpu::float_st6

◆ float_st7

uint64_t vm_cpu::float_st7

◆ float_stack_ptr

unsigned int vm_cpu::float_stack_ptr

◆ FP

uint32_t vm_cpu::FP

◆ FS

uint16_t vm_cpu::FS

◆ ge0

uint32_t vm_cpu::ge0

◆ ge1

uint32_t vm_cpu::ge1

◆ ge2

uint32_t vm_cpu::ge2

◆ ge3

uint32_t vm_cpu::ge3

◆ gie

uint32_t vm_cpu::gie

◆ GP

uint32_t vm_cpu::GP

◆ GS

uint16_t vm_cpu::GS

◆ HI

uint32_t vm_cpu::HI

◆ i_d

uint8_t vm_cpu::i_d

◆ i_f

uint8_t vm_cpu::i_f

◆ ID

uint32_t vm_cpu::ID

◆ in_erepeat

uint32_t vm_cpu::in_erepeat

◆ INDEX

uint32_t vm_cpu::INDEX

◆ interrupt_num

uint32_t vm_cpu::interrupt_num

◆ iopl_f

uint8_t vm_cpu::iopl_f

◆ is_repeat_end

uint32_t vm_cpu::is_repeat_end

◆ K0

uint32_t vm_cpu::K0

◆ K1

uint32_t vm_cpu::K1

◆ KSCRATCH0

uint32_t vm_cpu::KSCRATCH0

◆ KSCRATCH1

uint32_t vm_cpu::KSCRATCH1

◆ KSCRATCH2

uint32_t vm_cpu::KSCRATCH2

◆ KSCRATCH3

uint32_t vm_cpu::KSCRATCH3

◆ KSCRATCH4

uint32_t vm_cpu::KSCRATCH4

◆ KSCRATCH5

uint32_t vm_cpu::KSCRATCH5

◆ last_addr

uint32_t vm_cpu::last_addr

◆ LO

uint32_t vm_cpu::LO

◆ LP

uint32_t vm_cpu::LP

◆ LR [1/2]

uint64_t vm_cpu::LR

◆ LR [2/2]

uint32_t vm_cpu::LR

◆ MB0

uint32_t vm_cpu::MB0

◆ MB1

uint32_t vm_cpu::MB1

◆ ME0

uint32_t vm_cpu::ME0

◆ ME1

uint32_t vm_cpu::ME1

◆ MM0

uint64_t vm_cpu::MM0

◆ MM1

uint64_t vm_cpu::MM1

◆ MM2

uint64_t vm_cpu::MM2

◆ MM3

uint64_t vm_cpu::MM3

◆ MM4

uint64_t vm_cpu::MM4

◆ MM5

uint64_t vm_cpu::MM5

◆ MM6

uint64_t vm_cpu::MM6

◆ MM7

uint64_t vm_cpu::MM7

◆ my_tick

bn_t vm_cpu::my_tick

◆ nf [1/2]

uint32_t vm_cpu::nf

◆ nf [2/2]

uint8_t vm_cpu::nf

◆ NPC

uint32_t vm_cpu::NPC

◆ nt

uint8_t vm_cpu::nt

◆ of [1/2]

uint32_t vm_cpu::of

◆ of [2/2]

uint8_t vm_cpu::of

◆ OPT

uint32_t vm_cpu::OPT

◆ osc

uint32_t vm_cpu::osc

◆ PAGEGRAIN

uint32_t vm_cpu::PAGEGRAIN

◆ PAGEMASK

uint32_t vm_cpu::PAGEMASK

◆ PC [1/2]

uint32_t vm_cpu::PC

◆ PC [2/2]

uint32_t vm_cpu::PC

◆ PC_end

uint32_t vm_cpu::PC_end

◆ PC_FETCH

uint32_t vm_cpu::PC_FETCH

◆ pf

uint8_t vm_cpu::pf

◆ PRID

uint32_t vm_cpu::PRID

◆ PSW

uint32_t vm_cpu::PSW

◆ PWBASE

uint32_t vm_cpu::PWBASE

◆ PWCTL

uint32_t vm_cpu::PWCTL

◆ PWFIELD

uint32_t vm_cpu::PWFIELD

◆ PWSIZE

uint32_t vm_cpu::PWSIZE

◆ R0

uint32_t vm_cpu::R0

◆ R1

uint32_t vm_cpu::R1

◆ R10 [1/2]

uint32_t vm_cpu::R10

◆ R10 [2/2]

uint64_t vm_cpu::R10

◆ R11 [1/2]

uint32_t vm_cpu::R11

◆ R11 [2/2]

uint64_t vm_cpu::R11

◆ R12 [1/2]

uint32_t vm_cpu::R12

◆ R12 [2/2]

uint64_t vm_cpu::R12

◆ R13 [1/2]

uint32_t vm_cpu::R13

◆ R13 [2/2]

uint64_t vm_cpu::R13

◆ R14 [1/2]

uint32_t vm_cpu::R14

◆ R14 [2/2]

uint64_t vm_cpu::R14

◆ R15 [1/2]

uint32_t vm_cpu::R15

◆ R15 [2/2]

uint64_t vm_cpu::R15

◆ R2

uint32_t vm_cpu::R2

◆ R3

uint32_t vm_cpu::R3

◆ R4

uint32_t vm_cpu::R4

◆ R5

uint32_t vm_cpu::R5

◆ R6

uint32_t vm_cpu::R6

◆ R7

uint32_t vm_cpu::R7

◆ R8 [1/2]

uint32_t vm_cpu::R8

◆ R8 [2/2]

uint64_t vm_cpu::R8

◆ R9 [1/2]

uint32_t vm_cpu::R9

◆ R9 [2/2]

uint64_t vm_cpu::R9

◆ R_HI

uint32_t vm_cpu::R_HI

◆ R_LO

uint32_t vm_cpu::R_LO

◆ RA

uint32_t vm_cpu::RA

◆ RANDOM

uint32_t vm_cpu::RANDOM

◆ RAX

uint64_t vm_cpu::RAX

◆ RBP

uint64_t vm_cpu::RBP

◆ RBX

uint64_t vm_cpu::RBX

◆ RCFG

uint32_t vm_cpu::RCFG

◆ RCX

uint64_t vm_cpu::RCX

◆ RDI

uint64_t vm_cpu::RDI

◆ RDX

uint64_t vm_cpu::RDX

◆ reg_float_address

unsigned int vm_cpu::reg_float_address

◆ reg_float_control

unsigned int vm_cpu::reg_float_control

◆ reg_float_cs

unsigned int vm_cpu::reg_float_cs

◆ reg_float_ds

unsigned int vm_cpu::reg_float_ds

◆ reg_float_eip

unsigned int vm_cpu::reg_float_eip

◆ res

uint32_t vm_cpu::res

◆ reserve

uint32_t vm_cpu::reserve

◆ reserve_address

uint32_t vm_cpu::reserve_address

◆ rf

uint8_t vm_cpu::rf

◆ RIP

uint64_t vm_cpu::RIP

◆ RPB

uint32_t vm_cpu::RPB

◆ RPC

uint32_t vm_cpu::RPC

◆ RPC_current

uint32_t vm_cpu::RPC_current

◆ RPE

uint32_t vm_cpu::RPE

◆ RPE_instr_count

uint32_t vm_cpu::RPE_instr_count

◆ RSI

uint64_t vm_cpu::RSI

◆ RSP

uint64_t vm_cpu::RSP

◆ S0

uint32_t vm_cpu::S0

◆ S1

uint32_t vm_cpu::S1

◆ S10

uint32_t vm_cpu::S10

◆ S11

uint32_t vm_cpu::S11

◆ S2

uint32_t vm_cpu::S2

◆ S22

uint32_t vm_cpu::S22

◆ S29

uint32_t vm_cpu::S29

◆ S3

uint32_t vm_cpu::S3

◆ S30

uint32_t vm_cpu::S30

◆ S31

uint32_t vm_cpu::S31

◆ S32

uint32_t vm_cpu::S32

◆ S4

uint32_t vm_cpu::S4

◆ S5

uint32_t vm_cpu::S5

◆ S6

uint32_t vm_cpu::S6

◆ S7

uint32_t vm_cpu::S7

◆ S9

uint32_t vm_cpu::S9

◆ SAR

uint32_t vm_cpu::SAR

◆ scg0

uint32_t vm_cpu::scg0

◆ scg1

uint32_t vm_cpu::scg1

◆ SEGCTL0

uint32_t vm_cpu::SEGCTL0

◆ SEGCTL1

uint32_t vm_cpu::SEGCTL1

◆ SEGCTL2

uint32_t vm_cpu::SEGCTL2

◆ segm_base

uint64_t vm_cpu::segm_base[0x10000]

◆ SP [1/2]

uint32_t vm_cpu::SP

◆ SP [2/2]

uint32_t vm_cpu::SP

◆ spr_access

uint32_t vm_cpu::spr_access

◆ SS

uint16_t vm_cpu::SS

◆ T0

uint32_t vm_cpu::T0

◆ T1

uint32_t vm_cpu::T1

◆ T2

uint32_t vm_cpu::T2

◆ T3

uint32_t vm_cpu::T3

◆ T4

uint32_t vm_cpu::T4

◆ T5

uint32_t vm_cpu::T5

◆ T6

uint32_t vm_cpu::T6

◆ T7

uint32_t vm_cpu::T7

◆ T8

uint32_t vm_cpu::T8

◆ T9

uint32_t vm_cpu::T9

◆ take_jmp

uint32_t vm_cpu::take_jmp

◆ tf

uint8_t vm_cpu::tf

◆ TMP

uint32_t vm_cpu::TMP

◆ TP

uint32_t vm_cpu::TP

◆ tsc

uint64_t vm_cpu::tsc

◆ V0

uint32_t vm_cpu::V0

◆ V1

uint32_t vm_cpu::V1

◆ vif

uint8_t vm_cpu::vif

◆ vip

uint8_t vm_cpu::vip

◆ vm

uint8_t vm_cpu::vm

◆ WATCHHI

uint32_t vm_cpu::WATCHHI

◆ WIRED

uint32_t vm_cpu::WIRED

◆ X0

uint64_t vm_cpu::X0

◆ X1

uint64_t vm_cpu::X1

◆ X10

uint64_t vm_cpu::X10

◆ X11

uint64_t vm_cpu::X11

◆ X12

uint64_t vm_cpu::X12

◆ X13

uint64_t vm_cpu::X13

◆ X14

uint64_t vm_cpu::X14

◆ X15

uint64_t vm_cpu::X15

◆ X16

uint64_t vm_cpu::X16

◆ X17

uint64_t vm_cpu::X17

◆ X18

uint64_t vm_cpu::X18

◆ X19

uint64_t vm_cpu::X19

◆ X2

uint64_t vm_cpu::X2

◆ X20

uint64_t vm_cpu::X20

◆ X21

uint64_t vm_cpu::X21

◆ X22

uint64_t vm_cpu::X22

◆ X23

uint64_t vm_cpu::X23

◆ X24

uint64_t vm_cpu::X24

◆ X25

uint64_t vm_cpu::X25

◆ X26

uint64_t vm_cpu::X26

◆ X27

uint64_t vm_cpu::X27

◆ X28

uint64_t vm_cpu::X28

◆ X29

uint64_t vm_cpu::X29

◆ X3

uint64_t vm_cpu::X3

◆ X4

uint64_t vm_cpu::X4

◆ X5

uint64_t vm_cpu::X5

◆ X6

uint64_t vm_cpu::X6

◆ X7

uint64_t vm_cpu::X7

◆ X8

uint64_t vm_cpu::X8

◆ X9

uint64_t vm_cpu::X9

◆ XMM0

bn_t vm_cpu::XMM0

◆ XMM1

bn_t vm_cpu::XMM1

◆ XMM10

bn_t vm_cpu::XMM10

◆ XMM11

bn_t vm_cpu::XMM11

◆ XMM12

bn_t vm_cpu::XMM12

◆ XMM13

bn_t vm_cpu::XMM13

◆ XMM14

bn_t vm_cpu::XMM14

◆ XMM15

bn_t vm_cpu::XMM15

◆ XMM2

bn_t vm_cpu::XMM2

◆ XMM3

bn_t vm_cpu::XMM3

◆ XMM4

bn_t vm_cpu::XMM4

◆ XMM5

bn_t vm_cpu::XMM5

◆ XMM6

bn_t vm_cpu::XMM6

◆ XMM7

bn_t vm_cpu::XMM7

◆ XMM8

bn_t vm_cpu::XMM8

◆ XMM9

bn_t vm_cpu::XMM9

◆ ZERO

uint32_t vm_cpu::ZERO

◆ zf [1/2]

uint32_t vm_cpu::zf

◆ zf [2/2]

uint8_t vm_cpu::zf

The documentation for this struct was generated from the following files: