|
| miasm.arch.arm.arch.log = logging.getLogger("armdis") |
|
| miasm.arch.arm.arch.console_handler = logging.StreamHandler() |
|
| miasm.arch.arm.arch.reg_dum = ExprId('DumReg', 32) |
|
| miasm.arch.arm.arch.PC |
|
list | miasm.arch.arm.arch.regs_str = ['R%d' % r for r in range(0x10)] |
|
list | miasm.arch.arm.arch.regs_expr = [ExprId(x, 32) for x in regs_str] |
|
| miasm.arch.arm.arch.gpregs = reg_info(regs_str, regs_expr) |
|
| miasm.arch.arm.arch.gpregs_pc = reg_info(regs_str[-1:], regs_expr[-1:]) |
|
| miasm.arch.arm.arch.gpregs_sp = reg_info(regs_str[13:14], regs_expr[13:14]) |
|
| miasm.arch.arm.arch.gpregs_nosppc |
|
| miasm.arch.arm.arch.gpregs_nopc |
|
| miasm.arch.arm.arch.gpregs_nosp |
|
string | miasm.arch.arm.arch.sr_flags = "cxsf" |
|
list | miasm.arch.arm.arch.cpsr_regs_str = [] |
|
list | miasm.arch.arm.arch.spsr_regs_str = [] |
|
string | miasm.arch.arm.arch.o = "" |
|
list | miasm.arch.arm.arch.cpsr_regs_expr = [ExprId(x, 32) for x in cpsr_regs_str] |
|
list | miasm.arch.arm.arch.spsr_regs_expr = [ExprId(x, 32) for x in spsr_regs_str] |
|
| miasm.arch.arm.arch.cpsr_regs = reg_info(cpsr_regs_str, cpsr_regs_expr) |
|
| miasm.arch.arm.arch.spsr_regs = reg_info(spsr_regs_str, spsr_regs_expr) |
|
list | miasm.arch.arm.arch.cpregs_str = ['c%d' % r for r in range(0x10)] |
|
list | miasm.arch.arm.arch.cpregs_expr = [ExprId(x, 32) for x in cpregs_str] |
|
| miasm.arch.arm.arch.cp_regs = reg_info(cpregs_str, cpregs_expr) |
|
list | miasm.arch.arm.arch.pregs_str = ['p%d' % r for r in range(0x10)] |
|
list | miasm.arch.arm.arch.pregs_expr = [ExprId(x, 32) for x in pregs_str] |
|
| miasm.arch.arm.arch.p_regs = reg_info(pregs_str, pregs_expr) |
|
list | miasm.arch.arm.arch.conditional_branch |
|
list | miasm.arch.arm.arch.unconditional_branch = ["B", "BX", "BL", "BLX"] |
|
dictionary | miasm.arch.arm.arch.barrier_expr |
|
| miasm.arch.arm.arch.barrier_info = reg_info_dct(barrier_expr) |
|
| miasm.arch.arm.arch.LPARENTHESIS = Literal("(") |
|
| miasm.arch.arm.arch.RPARENTHESIS = Literal(")") |
|
| miasm.arch.arm.arch.LACC = Suppress(Literal("{")) |
|
| miasm.arch.arm.arch.RACC = Suppress(Literal("}")) |
|
| miasm.arch.arm.arch.MINUS = Suppress(Literal("-")) |
|
| miasm.arch.arm.arch.CIRCUNFLEX = Literal("^") |
|
| miasm.arch.arm.arch.int_1_31 = str_int.copy().setParseAction(lambda v: check_bounds(1, 31, v[0])) |
|
| miasm.arch.arm.arch.int_1_32 = str_int.copy().setParseAction(lambda v: check_bounds(1, 32, v[0])) |
|
| miasm.arch.arm.arch.int_8_16_24 = str_int.copy().setParseAction(lambda v: check_values([8, 16, 24], v[0])) |
|
list | miasm.arch.arm.arch.allshifts = ['<<', '>>', 'a>>', '>>>', 'rrx'] |
|
list | miasm.arch.arm.arch.allshifts_armt = ['<<', '>>', 'a>>', '>>>', 'rrx'] |
|
dictionary | miasm.arch.arm.arch.shift2expr_dct |
|
| miasm.arch.arm.arch.expr2shift_dct = dict((value, key) for key, value in viewitems(shift2expr_dct)) |
|
| miasm.arch.arm.arch.reg_duo |
|
| miasm.arch.arm.arch.reg_or_duo = reg_duo | gpregs.parser |
|
| miasm.arch.arm.arch.gpreg_list |
|
| miasm.arch.arm.arch.LBRACK = Suppress("[") |
|
| miasm.arch.arm.arch.RBRACK = Suppress("]") |
|
| miasm.arch.arm.arch.COMMA = Suppress(",") |
|
| miasm.arch.arm.arch.all_binaryop_1_31_shifts_t |
|
| miasm.arch.arm.arch.all_binaryop_1_32_shifts_t |
|
| miasm.arch.arm.arch.all_unaryop_shifts_t = literal_list(['RRX']).setParseAction(op_shift2expr) |
|
| miasm.arch.arm.arch.ror_shifts_t = literal_list(['ROR']).setParseAction(op_shift2expr) |
|
| miasm.arch.arm.arch.shl_shifts_t = literal_list(['SHL']).setParseAction(op_shift2expr) |
|
| miasm.arch.arm.arch.allshifts_t_armt |
|
| miasm.arch.arm.arch.gpreg_p = gpregs.parser |
|
| miasm.arch.arm.arch.psr_p = cpsr_regs.parser | spsr_regs.parser |
|
tuple | miasm.arch.arm.arch.shift_off |
|
tuple | miasm.arch.arm.arch.rot2_expr |
|
tuple | miasm.arch.arm.arch.rot5_expr = shift_off |
|
| miasm.arch.arm.arch.OP_LSL = Suppress("LSL") |
|
tuple | miasm.arch.arm.arch.deref_reg_reg = (LBRACK + gpregs.parser + COMMA + gpregs.parser + RBRACK).setParseAction(cb_deref_reg_reg) |
|
tuple | miasm.arch.arm.arch.deref_reg_reg_lsl_1 = (LBRACK + gpregs.parser + COMMA + gpregs.parser + OP_LSL + base_expr + RBRACK).setParseAction(cb_deref_reg_reg_lsl_1) |
|
| miasm.arch.arm.arch.reg_or_base = gpregs.parser | base_expr |
|
| miasm.arch.arm.arch.deref_nooff |
|
| miasm.arch.arm.arch.deref_pre |
|
| miasm.arch.arm.arch.deref_post |
|
| miasm.arch.arm.arch.deref |
|
| miasm.arch.arm.arch.gpregs_wb = Group(gpregs.parser + Optional('!')).setParseAction(cb_gpreb_wb) |
|
list | miasm.arch.arm.arch.cond_list_full |
|
list | miasm.arch.arm.arch.cond_list |
|
| miasm.arch.arm.arch.cond_dct = dict([(x[1], x[0]) for x in enumerate(cond_list)]) |
|
| miasm.arch.arm.arch.bm_cond = bs_mod_name(l=4, fname='cond', mn_mod=cond_list) |
|
| miasm.arch.arm.arch.cond_dct_barmt = dict([(x[0], x[1]) for x in enumerate(cond_list) if x[0] & 0b1110 != 0b1110]) |
|
| miasm.arch.arm.arch.bm_cond_barmt = bs_mod_name(l=4, fname='cond', mn_mod=cond_dct_barmt) |
|
| miasm.arch.arm.arch.accum = bs(l=1) |
|
| miasm.arch.arm.arch.scc = bs_mod_name(l=1, fname='scc', mn_mod=['', 'S']) |
|
| miasm.arch.arm.arch.dumscc = bs("1") |
|
| miasm.arch.arm.arch.rd = bs(l=4, cls=(arm_gpreg,)) |
|
| miasm.arch.arm.arch.rdl = bs(l=4, cls=(arm_gpreg,)) |
|
| miasm.arch.arm.arch.rn = bs(l=4, cls=(arm_gpreg,), fname="rn") |
|
| miasm.arch.arm.arch.rs = bs(l=4, cls=(arm_gpreg,)) |
|
| miasm.arch.arm.arch.rm = bs(l=4, cls=(arm_gpreg,), fname='rm') |
|
| miasm.arch.arm.arch.ra = bs(l=4, cls=(arm_gpreg,)) |
|
| miasm.arch.arm.arch.rt = bs(l=4, cls=(arm_gpreg,), fname='rt') |
|
| miasm.arch.arm.arch.rt2 = bs(l=4, cls=(arm_gpreg,)) |
|
| miasm.arch.arm.arch.rm_cp = bs(l=4, cls=(armt_rm_cp,)) |
|
| miasm.arch.arm.arch.op2 = bs(l=12, cls=(arm_op2,)) |
|
| miasm.arch.arm.arch.lnk = bs_lnk(l=1, fname='lnk', mn_mod=['', 'L']) |
|
| miasm.arch.arm.arch.offs = bs(l=24, cls=(arm_offs,), fname="offs") |
|
| miasm.arch.arm.arch.rn_noarg = bs(l=4, cls=(arm_gpreg_noarg,), fname="rn") |
|
| miasm.arch.arm.arch.rm_noarg = bs(l=4, cls=(arm_gpreg_noarg,), fname="rm", order = -1) |
|
| miasm.arch.arm.arch.immop = bs(l=1, fname='immop') |
|
| miasm.arch.arm.arch.dumr = bs(l=4, default_val="0000", fname="dumr") |
|
| miasm.arch.arm.arch.psr = bs(l=1, fname="psr") |
|
| miasm.arch.arm.arch.psr_field = bs(l=4, cls=(arm_psr,)) |
|
| miasm.arch.arm.arch.ppi = bs(l=1, fname='ppi') |
|
| miasm.arch.arm.arch.updown = bs(l=1, fname='updown') |
|
| miasm.arch.arm.arch.trb = bs_mod_name(l=1, fname='trb', mn_mod=['', 'B']) |
|
| miasm.arch.arm.arch.wback = bs_mod_name(l=1, fname="wback", mn_mod=['', 'T']) |
|
| miasm.arch.arm.arch.wback_no_t = bs(l=1, fname="wback") |
|
| miasm.arch.arm.arch.op2imm = bs(l=12, cls=(arm_op2imm,)) |
|
| miasm.arch.arm.arch.updown_b_nosp = updown_b_nosp_mn(l=1, mn_mod=['D', 'I'], fname='updown') |
|
| miasm.arch.arm.arch.ppi_b_nosp = ppi_b_nosp_mn(l=1, mn_mod=['A', 'B'], fname='ppi') |
|
| miasm.arch.arm.arch.updown_b_sp = updown_b_sp_mn(l=1, mn_mod=['A', 'D'], fname='updown') |
|
| miasm.arch.arm.arch.ppi_b_sp = ppi_b_sp_mn(l=1, mn_mod=['F', 'E'], fname='ppi') |
|
| miasm.arch.arm.arch.sbit = bs(l=1, fname="sbit") |
|
| miasm.arch.arm.arch.rn_sp = bs("1101", cls=(arm_reg_wb,), fname='rnsp') |
|
| miasm.arch.arm.arch.rn_wb = bs(l=4, cls=(arm_reg_wb_nosp,), fname='rn') |
|
| miasm.arch.arm.arch.rlist = bs(l=16, cls=(arm_rlist,), fname='rlist') |
|
| miasm.arch.arm.arch.swi_i = bs(l=24, cls=(arm_imm,), fname="swi_i") |
|
| miasm.arch.arm.arch.opc = bs(l=4, cls=(arm_imm, m_arg), fname='opc') |
|
| miasm.arch.arm.arch.crn = bs(l=4, cls=(arm_cpreg,), fname='crn') |
|
| miasm.arch.arm.arch.crd = bs(l=4, cls=(arm_cpreg,), fname='crd') |
|
| miasm.arch.arm.arch.crm = bs(l=4, cls=(arm_cpreg,), fname='crm') |
|
| miasm.arch.arm.arch.cpnum = bs(l=4, cls=(arm_preg,), fname='cpnum') |
|
| miasm.arch.arm.arch.cp = bs(l=3, cls=(arm_imm, m_arg), fname='cp') |
|
| miasm.arch.arm.arch.imm8_12 = bs(l=8, cls=(arm_imm8_12, m_arg), fname='imm') |
|
| miasm.arch.arm.arch.tl = bs_mod_name(l=1, fname="tl", mn_mod=['', 'L']) |
|
| miasm.arch.arm.arch.cpopc = bs(l=3, cls=(arm_imm, m_arg), fname='cpopc') |
|
| miasm.arch.arm.arch.imm20 = bs(l=20, cls=(arm_imm, m_arg)) |
|
| miasm.arch.arm.arch.imm4 = bs(l=4, cls=(arm_imm, m_arg)) |
|
| miasm.arch.arm.arch.imm12 = bs(l=12, cls=(arm_imm, m_arg)) |
|
| miasm.arch.arm.arch.imm16 = bs(l=16, cls=(arm_imm, m_arg)) |
|
| miasm.arch.arm.arch.imm12_off = bs(l=12, fname="imm") |
|
| miasm.arch.arm.arch.imm2_noarg = bs(l=2, fname="imm") |
|
| miasm.arch.arm.arch.imm4_noarg = bs(l=4, fname="imm4") |
|
| miasm.arch.arm.arch.imm_4_12 = bs(l=12, cls=(arm_imm_4_12,)) |
|
| miasm.arch.arm.arch.imm12_noarg = bs(l=12, fname="imm") |
|
| miasm.arch.arm.arch.imm_12_4 = bs(l=4, cls=(arm_imm_12_4,)) |
|
| miasm.arch.arm.arch.lowb = bs(l=1, fname='lowb') |
|
| miasm.arch.arm.arch.offs_blx = bs(l=24, cls=(arm_offs_blx,), fname="offs") |
|
| miasm.arch.arm.arch.fix_cond = bs("1111", fname="cond") |
|
| miasm.arch.arm.arch.mul_x = mul_part_x(l=1, fname='x', mn_mod=['B', 'T']) |
|
| miasm.arch.arm.arch.mul_y = mul_part_y(l=1, fname='y', mn_mod=['B', 'T']) |
|
| miasm.arch.arm.arch.immedH = bs(l=4, fname='immedH') |
|
| miasm.arch.arm.arch.immedL = bs(l=4, cls=(arm_immed, m_arg), fname='immedL') |
|
| miasm.arch.arm.arch.hb = bs(l=1) |
|
| miasm.arch.arm.arch.rot_rm = bs(l=2, cls=(armt2_rot_rm,), fname="rot_rm") |
|
| miasm.arch.arm.arch.mem_rn_imm = bs(l=4, cls=(arm_mem_rn_imm,), order=1) |
|
list | miasm.arch.arm.arch.op_list |
|
dictionary | miasm.arch.arm.arch.data_mov_name = {'MOV': 13, 'MVN': 15} |
|
dictionary | miasm.arch.arm.arch.data_test_name = {'TST': 8, 'TEQ': 9, 'CMP': 10, 'CMN': 11} |
|
dictionary | miasm.arch.arm.arch.data_name = {} |
|
| miasm.arch.arm.arch.bs_data_name = bs_name(l=4, name=data_name) |
|
| miasm.arch.arm.arch.bs_data_mov_name = bs_name(l=4, name=data_mov_name) |
|
| miasm.arch.arm.arch.bs_data_test_name = bs_name(l=4, name=data_test_name) |
|
dictionary | miasm.arch.arm.arch.transfer_name = {'STR': 0, 'LDR': 1} |
|
| miasm.arch.arm.arch.bs_transfer_name = bs_name(l=1, name=transfer_name) |
|
dictionary | miasm.arch.arm.arch.transferh_name = {'STRH': 0, 'LDRH': 1} |
|
| miasm.arch.arm.arch.bs_transferh_name = bs_name(l=1, name=transferh_name) |
|
dictionary | miasm.arch.arm.arch.transfer_ldr_name = {'LDRD': 0, 'LDRSB': 1} |
|
| miasm.arch.arm.arch.bs_transfer_ldr_name = bs_name(l=1, name=transfer_ldr_name) |
|
dictionary | miasm.arch.arm.arch.btransfer_name = {'STM': 0, 'LDM': 1} |
|
| miasm.arch.arm.arch.bs_btransfer_name = bs_name(l=1, name=btransfer_name) |
|
dictionary | miasm.arch.arm.arch.ctransfer_name = {'STC': 0, 'LDC': 1} |
|
| miasm.arch.arm.arch.bs_ctransfer_name = bs_name(l=1, name=ctransfer_name) |
|
dictionary | miasm.arch.arm.arch.mr_name = {'MCR': 0, 'MRC': 1} |
|
| miasm.arch.arm.arch.bs_mr_name = bs_name(l=1, name=mr_name) |
|
| miasm.arch.arm.arch.bs_addi = bs(l=1, fname="add_imm") |
|
| miasm.arch.arm.arch.bs_rw = bs_mod_name(l=1, fname='rw', mn_mod=['W', '']) |
|
| miasm.arch.arm.arch.barrier_option = bs(l=4, cls=(armt_barrier_option,)) |
|
| miasm.arch.arm.arch.rm_rot2 = bs(l=4, cls=(arm_rm_rot2,), fname="rm") |
|
| miasm.arch.arm.arch.rot2 = bs(l=2, fname="rot2") |
|
| miasm.arch.arm.arch.rm_rot5_lsl = bs(l=4, cls=(arm_rm_rot5_lsl,), fname="rm") |
|
| miasm.arch.arm.arch.rm_rot5_asr = bs(l=4, cls=(arm_rm_rot5_asr,), fname="rm") |
|
| miasm.arch.arm.arch.rot5 = bs(l=5, fname="rot5") |
|
| miasm.arch.arm.arch.widthm1 = bs(l=5, cls=(arm_widthm1, m_arg)) |
|
| miasm.arch.arm.arch.lsb = bs(l=5, cls=(arm_imm, m_arg)) |
|
| miasm.arch.arm.arch.rd_nopc = bs(l=4, cls=(arm_gpreg_nopc, arm_arg), fname="rd") |
|
| miasm.arch.arm.arch.rn_nopc = bs(l=4, cls=(arm_gpreg_nopc, arm_arg), fname="rn") |
|
| miasm.arch.arm.arch.ra_nopc = bs(l=4, cls=(arm_gpreg_nopc, arm_arg), fname="ra") |
|
| miasm.arch.arm.arch.rt_nopc = bs(l=4, cls=(arm_gpreg_nopc, arm_arg), fname="rt") |
|
| miasm.arch.arm.arch.rn_nosp = bs(l=4, cls=(arm_gpreg_nosp, arm_arg), fname="rn") |
|
| miasm.arch.arm.arch.rn_nopc_noarg = bs(l=4, cls=(arm_gpreg_nopc,), fname="rn") |
|
| miasm.arch.arm.arch.gpregs_l = reg_info(regs_str[:8], regs_expr[:8]) |
|
| miasm.arch.arm.arch.gpregs_h = reg_info(regs_str[8:], regs_expr[8:]) |
|
| miasm.arch.arm.arch.gpregs_sppc |
|
| miasm.arch.arm.arch.deref_reg_imm |
|
| miasm.arch.arm.arch.deref_low |
|
| miasm.arch.arm.arch.deref_pc |
|
| miasm.arch.arm.arch.deref_sp |
|
| miasm.arch.arm.arch.gpregs_l_wb |
|
| miasm.arch.arm.arch.gpregs_l_13 = reg_info(regs_str[:13], regs_expr[:13]) |
|
| miasm.arch.arm.arch.off5 = bs(l=5, cls=(arm_imm,), fname="off") |
|
| miasm.arch.arm.arch.off3 = bs(l=3, cls=(arm_imm,), fname="off") |
|
| miasm.arch.arm.arch.off8 = bs(l=8, cls=(arm_imm,), fname="off") |
|
| miasm.arch.arm.arch.off7 = bs(l=7, cls=(arm_off7,), fname="off") |
|
| miasm.arch.arm.arch.rnl = bs(l=3, cls=(arm_gpreg_l,), fname="rn") |
|
| miasm.arch.arm.arch.rsl = bs(l=3, cls=(arm_gpreg_l,), fname="rs") |
|
| miasm.arch.arm.arch.rml = bs(l=3, cls=(arm_gpreg_l,), fname="rm") |
|
| miasm.arch.arm.arch.rol = bs(l=3, cls=(arm_gpreg_l,), fname="ro") |
|
| miasm.arch.arm.arch.rbl = bs(l=3, cls=(arm_gpreg_l,), fname="rb") |
|
| miasm.arch.arm.arch.rbl_deref = bs(l=3, cls=(arm_derefl,), fname="rb") |
|
| miasm.arch.arm.arch.dumrh = bs(l=3, default_val="000") |
|
| miasm.arch.arm.arch.rdh = bs(l=3, cls=(arm_gpreg_h,), fname="rd") |
|
| miasm.arch.arm.arch.rsh = bs(l=3, cls=(arm_gpreg_h,), fname="rs") |
|
| miasm.arch.arm.arch.offpc8 = bs(l=8, cls=(arm_offpc,), fname="offs") |
|
| miasm.arch.arm.arch.offsp8 = bs(l=8, cls=(arm_offsp,), fname="offs") |
|
| miasm.arch.arm.arch.rol_noarg = bs(l=3, cls=(arm_gpreg_l_noarg,), fname="off") |
|
| miasm.arch.arm.arch.off5bw = bs(l=5, cls=(arm_offbw,), fname="off") |
|
| miasm.arch.arm.arch.off5h = bs(l=5, cls=(arm_offh,), fname="off") |
|
| miasm.arch.arm.arch.sppc = bs(l=1, cls=(arm_sppc,)) |
|
| miasm.arch.arm.arch.off12 = bs(l=12, cls=(arm_off,), fname="off", order=-1) |
|
| miasm.arch.arm.arch.rn_deref = bs(l=4, cls=(arm_deref_reg_imm,), fname="rt") |
|
| miasm.arch.arm.arch.pclr = bs(l=1, fname='pclr', order=-2) |
|
| miasm.arch.arm.arch.pc_in = bs(l=1, fname='pc_in', order=-2) |
|
| miasm.arch.arm.arch.lr_in = bs(l=1, fname='lr_in', order=-2) |
|
| miasm.arch.arm.arch.sp = bs(l=0, cls=(arm_sp,)) |
|
| miasm.arch.arm.arch.off8s = bs(l=8, cls=(arm_offs,), fname="offs") |
|
| miasm.arch.arm.arch.trlistpclr = bs(l=8, cls=(armt_rlist_pclr,)) |
|
| miasm.arch.arm.arch.trlist = bs(l=8, cls=(armt_rlist,), fname="trlist", order = -1) |
|
| miasm.arch.arm.arch.trlist13 = bs(l=13, cls=(armt_rlist13,), fname="trlist", order = -1) |
|
| miasm.arch.arm.arch.trlist13pclr = bs(l=13, cls=(armt_rlist13_pc_lr,), fname="trlist", order = -1) |
|
| miasm.arch.arm.arch.rbl_wb = bs(l=3, cls=(armt_reg_wb,), fname='rb') |
|
| miasm.arch.arm.arch.offs8 = bs(l=8, cls=(arm_offspc,), fname="offs") |
|
| miasm.arch.arm.arch.offs11 = bs(l=11, cls=(arm_offspc,), fname="offs") |
|
| miasm.arch.arm.arch.hl = bs(l=1, prio=default_prio + 1, fname='hl') |
|
| miasm.arch.arm.arch.off8sppc = bs(l=8, cls=(arm_off8sppc,), fname="off") |
|
| miasm.arch.arm.arch.imm8_d1 = bs(l=8, default_val="00000001") |
|
| miasm.arch.arm.arch.imm8 = bs(l=8, cls=(arm_imm,), default_val = "00000001") |
|
dictionary | miasm.arch.arm.arch.mshift_name = {'LSLS': 0, 'LSRS': 1, 'ASRS': 2} |
|
| miasm.arch.arm.arch.bs_mshift_name = bs_name(l=2, name=mshift_name) |
|
dictionary | miasm.arch.arm.arch.addsub_name = {'ADDS': 0, 'SUBS': 1} |
|
| miasm.arch.arm.arch.bs_addsub_name = bs_name(l=1, name=addsub_name) |
|
dictionary | miasm.arch.arm.arch.mov_cmp_add_sub_name = {'MOVS': 0, 'CMP': 1, 'ADDS': 2, 'SUBS': 3} |
|
| miasm.arch.arm.arch.bs_mov_cmp_add_sub_name = bs_name(l=2, name=mov_cmp_add_sub_name) |
|
dictionary | miasm.arch.arm.arch.alu_name |
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| miasm.arch.arm.arch.bs_alu_name = bs_name(l=4, name=alu_name) |
|
dictionary | miasm.arch.arm.arch.hiregop_name = {'ADDS': 0, 'CMP': 1, 'MOV': 2} |
|
| miasm.arch.arm.arch.bs_hiregop_name = bs_name(l=2, name=hiregop_name) |
|
dictionary | miasm.arch.arm.arch.ldr_str_name = {'STR': 0, 'LDR': 1} |
|
| miasm.arch.arm.arch.bs_ldr_str_name = bs_name(l=1, name=ldr_str_name) |
|
dictionary | miasm.arch.arm.arch.ldrh_strh_name = {'STRH': 0, 'LDRH': 1} |
|
| miasm.arch.arm.arch.bs_ldrh_strh_name = bs_name(l=1, name=ldrh_strh_name) |
|
dictionary | miasm.arch.arm.arch.ldstsp_name = {'STR': 0, 'LDR': 1} |
|
| miasm.arch.arm.arch.bs_ldstsp_name = bs_name(l=1, name=ldstsp_name) |
|
dictionary | miasm.arch.arm.arch.addsubsp_name = {'ADD': 0, 'SUB': 1} |
|
| miasm.arch.arm.arch.bs_addsubsp_name = bs_name(l=1, name=addsubsp_name) |
|
dictionary | miasm.arch.arm.arch.pushpop_name = {'PUSH': 0, 'POP': 1} |
|
| miasm.arch.arm.arch.bs_pushpop_name = bs_name(l=1, name=pushpop_name, fname='pp') |
|
dictionary | miasm.arch.arm.arch.tbtransfer_name = {'STMIA': 0, 'LDMIA': 1} |
|
| miasm.arch.arm.arch.bs_tbtransfer_name = bs_name(l=1, name=tbtransfer_name) |
|
dictionary | miasm.arch.arm.arch.br_name |
|
| miasm.arch.arm.arch.bs_br_name = bs_name(l=4, name=br_name) |
|
tuple | miasm.arch.arm.arch.armt_gpreg_shift_off = (gpregs_nosppc.parser + allshifts_t_armt + (gpregs.parser | int_1_31)).setParseAction(cb_shift) |
|
| miasm.arch.arm.arch.rn_nosppc = bs(l=4, cls=(arm_gpreg_nosppc,), fname="rn") |
|
| miasm.arch.arm.arch.rd_nosppc = bs(l=4, cls=(arm_gpreg_nosppc,), fname="rd") |
|
| miasm.arch.arm.arch.rm_sh = bs(l=4, cls=(armt_gpreg_rm_shift_off,), fname="rm") |
|
| miasm.arch.arm.arch.imm12_1 = bs(l=1, fname="imm12_1", order=1) |
|
| miasm.arch.arm.arch.imm12_3 = bs(l=3, fname="imm12_3", order=1) |
|
| miasm.arch.arm.arch.imm12_8 = bs(l=8, cls=(armt2_imm12,), fname="imm", order=2) |
|
| miasm.arch.arm.arch.imm12_8_t4 = bs(l=8, cls=(armt4_imm12,), fname="imm", order=2) |
|
| miasm.arch.arm.arch.imm16_1 = bs(l=1, fname="imm16_1", order=1) |
|
| miasm.arch.arm.arch.imm16_3 = bs(l=3, fname="imm16_3", order=1) |
|
| miasm.arch.arm.arch.imm16_4 = bs(l=4, fname="imm16_4", order=1) |
|
| miasm.arch.arm.arch.imm16_8 = bs(l=8, cls=(armt2_imm16,), fname="imm", order=2) |
|
| miasm.arch.arm.arch.imm5_3 = bs(l=3, fname="imm5_3") |
|
| miasm.arch.arm.arch.imm5_2 = bs(l=2, fname="imm5_2") |
|
| miasm.arch.arm.arch.imm_stype = bs(l=2, fname="stype") |
|
| miasm.arch.arm.arch.imm_stype_00 = bs('00', fname="stype") |
|
| miasm.arch.arm.arch.imm_stype_01 = bs('01', fname="stype") |
|
| miasm.arch.arm.arch.imm_stype_11 = bs('11', fname="stype") |
|
| miasm.arch.arm.arch.imm1 = bs(l=1, fname="imm1") |
|
| miasm.arch.arm.arch.off20_6 = bs(l=6, fname="off20_6", order=1) |
|
| miasm.arch.arm.arch.off20_11 = bs(l=11, cls=(armt2_off20,), fname="imm", order=2) |
|
| miasm.arch.arm.arch.lsb5_3 = bs(l=3, fname="lsb5_3", order=1) |
|
| miasm.arch.arm.arch.lsb5_2 = bs(l=2, cls=(armt2_lsb5,), fname="imm", order=2) |
|
list | miasm.arch.arm.arch.aif_str = ["X", "F", "I", "IF", "A", "AF", "AI", "AIF"] |
|
list | miasm.arch.arm.arch.aif_expr = [ExprId(x, 32) if x != None else None for x in aif_str] |
|
| miasm.arch.arm.arch.aif_reg = reg_info(aif_str, aif_expr) |
|
list | miasm.arch.arm.arch.cond_expr = [ExprId(x, 32) for x in cond_list_full] |
|
| miasm.arch.arm.arch.cond_info = reg_info(cond_list_full, cond_expr) |
|
| miasm.arch.arm.arch.aif = bs(l=3, cls=(armt_aif,)) |
|
| miasm.arch.arm.arch.imm5_off = bs(l=5, cls=(armt_imm5_1,), fname="imm5_off") |
|
| miasm.arch.arm.arch.tsign = bs(l=1, fname="sign") |
|
| miasm.arch.arm.arch.tj1 = bs(l=1, fname="j1") |
|
| miasm.arch.arm.arch.tj2 = bs(l=1, fname="j2") |
|
| miasm.arch.arm.arch.timm6h = bs(l=6, fname="imm6h") |
|
| miasm.arch.arm.arch.timm10H = bs(l=10, fname="imm10h") |
|
| miasm.arch.arm.arch.timm10L = bs(l=10, cls=(armt2_imm10l,), fname="imm10l") |
|
| miasm.arch.arm.arch.timm11L = bs(l=11, cls=(armt2_imm11l,), fname="imm11l") |
|
| miasm.arch.arm.arch.timm6h11l = bs(l=11, cls=(armt2_imm6_11l,), fname="imm6h11l") |
|
| miasm.arch.arm.arch.itcond = bs(l=4, fname="itcond") |
|
| miasm.arch.arm.arch.itmask = armt_itmask(l=4, fname="itmask") |
|
| miasm.arch.arm.arch.bs_cond_arg_msb = bs(l=3, cls=(armt_cond_arg,)) |
|
| miasm.arch.arm.arch.condlsb = armt_cond_lsb(l=1, fname="condlsb") |
|
| miasm.arch.arm.arch.deref_immpuw = bs(l=8, cls=(armt_op2imm,)) |
|
| miasm.arch.arm.arch.deref_immpuw00 = bs(l=8, cls=(armt_op2imm00,)) |
|
| miasm.arch.arm.arch.rm_deref_reg = bs(l=4, cls=(armt_deref_reg,)) |
|
| miasm.arch.arm.arch.bs_deref_reg_reg = bs(l=4, cls=(armt_deref_reg_reg,)) |
|
| miasm.arch.arm.arch.bs_deref_reg_reg_lsl_1 = bs(l=4, cls=(armt_deref_reg_reg_lsl_1,)) |
|