miasm
Reverse engineering framework
|
Variables | |
PC | |
PC_FETCH | |
R_LO = ExprId('R_LO', 32) | |
R_HI = ExprId('R_HI', 32) | |
exception_flags = ExprId('exception_flags', 32) | |
PC_init = ExprId("PC_init", 32) | |
PC_FETCH_init = ExprId("PC_FETCH_init", 32) | |
list | regs32_str = ["ZERO", 'AT', 'V0', 'V1'] +\ |
list | regs32_expr = [ExprId(x, 32) for x in regs32_str] |
list | ZERO = regs32_expr[0] |
list | regs_flt_str = ['F%d'%i for i in range(0x20)] |
list | regs_fcc_str = ['FCC%d'%i for i in range(8)] |
R_LO_init = ExprId('R_LO_init', 32) | |
R_HI_init = ExprId('R_HI_init', 32) | |
list | cpr0_str = ["CPR0_%d"%x for x in range(0x100)] |
regs_cpr0_expr | |
regs_cpr0_init | |
regs_cpr0_info | |
gpregs_expr | |
gpregs_init | |
gpregs | |
regs_flt_expr | |
regs_flt_init | |
fltregs | |
sz | |
regs_fcc_expr | |
regs_fcc_init | |
fccregs | |
list | all_regs_ids = [PC, PC_FETCH, R_LO, R_HI, exception_flags] + gpregs_expr + regs_flt_expr + \ |
all_regs_ids_byname = dict([(x.name, x) for x in all_regs_ids]) | |
list | all_regs_ids_init = [ExprId("%s_init" % reg.name, reg.size) for reg in all_regs_ids] |
list | all_regs_ids_no_alias = all_regs_ids[:] |
dictionary | attrib_to_regs |
dictionary | regs_init = {} |
list miasm.arch.mips32.regs.all_regs_ids = [PC, PC_FETCH, R_LO, R_HI, exception_flags] + gpregs_expr + regs_flt_expr + \ |
miasm.arch.mips32.regs.all_regs_ids_byname = dict([(x.name, x) for x in all_regs_ids]) |
list miasm.arch.mips32.regs.all_regs_ids_init = [ExprId("%s_init" % reg.name, reg.size) for reg in all_regs_ids] |
list miasm.arch.mips32.regs.all_regs_ids_no_alias = all_regs_ids[:] |
dictionary miasm.arch.mips32.regs.attrib_to_regs |
list miasm.arch.mips32.regs.cpr0_str = ["CPR0_%d"%x for x in range(0x100)] |
miasm.arch.mips32.regs.exception_flags = ExprId('exception_flags', 32) |
miasm.arch.mips32.regs.fccregs |
miasm.arch.mips32.regs.fltregs |
miasm.arch.mips32.regs.gpregs |
miasm.arch.mips32.regs.gpregs_expr |
miasm.arch.mips32.regs.gpregs_init |
miasm.arch.mips32.regs.PC |
miasm.arch.mips32.regs.PC_FETCH |
miasm.arch.mips32.regs.PC_FETCH_init = ExprId("PC_FETCH_init", 32) |
miasm.arch.mips32.regs.PC_init = ExprId("PC_init", 32) |
miasm.arch.mips32.regs.R_HI = ExprId('R_HI', 32) |
miasm.arch.mips32.regs.R_HI_init = ExprId('R_HI_init', 32) |
miasm.arch.mips32.regs.R_LO = ExprId('R_LO', 32) |
miasm.arch.mips32.regs.R_LO_init = ExprId('R_LO_init', 32) |
list miasm.arch.mips32.regs.regs32_expr = [ExprId(x, 32) for x in regs32_str] |
list miasm.arch.mips32.regs.regs32_str = ["ZERO", 'AT', 'V0', 'V1'] +\ |
miasm.arch.mips32.regs.regs_cpr0_expr |
miasm.arch.mips32.regs.regs_cpr0_info |
miasm.arch.mips32.regs.regs_cpr0_init |
miasm.arch.mips32.regs.regs_fcc_expr |
miasm.arch.mips32.regs.regs_fcc_init |
list miasm.arch.mips32.regs.regs_fcc_str = ['FCC%d'%i for i in range(8)] |
miasm.arch.mips32.regs.regs_flt_expr |
miasm.arch.mips32.regs.regs_flt_init |
list miasm.arch.mips32.regs.regs_flt_str = ['F%d'%i for i in range(0x20)] |
dictionary miasm.arch.mips32.regs.regs_init = {} |
miasm.arch.mips32.regs.sz |
list miasm.arch.mips32.regs.ZERO = regs32_expr[0] |