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miasm
Reverse engineering framework
|
Classes | |
| class | ir_x86_16 |
| class | ir_x86_32 |
| class | ir_x86_64 |
Functions | |
| def | update_flag_zf_eq (a, b) |
| def | update_flag_zf (a) |
| def | update_flag_nf (arg) |
| def | update_flag_pf (a) |
| def | update_flag_af (op1, op2, res) |
| def | update_flag_znp (a) |
| def | update_flag_np (result) |
| def | null_flag_co () |
| def | update_flag_arith (a) |
| def | update_flag_zfaddwc_eq (arg1, arg2, arg3) |
| def | update_flag_zfsubwc_eq (arg1, arg2, arg3) |
| def | update_flag_arith_add_znp (arg1, arg2) |
| def | update_flag_arith_addwc_znp (arg1, arg2, arg3) |
| def | update_flag_arith_sub_znp (arg1, arg2) |
| def | update_flag_arith_subwc_znp (arg1, arg2, arg3) |
| def | check_ops_msb (a, b, c) |
| def | arith_flag (a, b, c) |
| def | update_flag_add_cf (op1, op2, res) |
| def | update_flag_add_of (op1, op2, res) |
| def | update_flag_sub_cf (op1, op2, res) |
| def | update_flag_sub_of (op1, op2, res) |
| def | update_flag_addwc_cf (op1, op2, op3) |
| def | update_flag_addwc_of (op1, op2, op3) |
| def | update_flag_subwc_cf (op1, op2, op3) |
| def | update_flag_subwc_of (op1, op2, op3) |
| def | update_flag_arith_add_co (x, y, z) |
| def | update_flag_arith_sub_co (x, y, z) |
| def | update_flag_arith_addwc_co (arg1, arg2, arg3) |
| def | update_flag_arith_subwc_co (arg1, arg2, arg3) |
| def | set_float_cs_eip (instr) |
| def | mode2addrsize (mode) |
| def | instr2addrsize (instr) |
| def | expraddr (mode, ptr) |
| def | fix_mem_args_size (instr, *args) |
| def | mem2double (instr, arg) |
| def | float_implicit_st0 (arg1, arg2) |
| def | gen_jcc (ir, instr, cond, dst, jmp_if) |
| def | gen_fcmov (ir, instr, cond, arg1, arg2, mov_if) |
| def | gen_cmov (ir, instr, cond, dst, src, mov_if) |
| def | mov (_, instr, dst, src) |
| def | movq (_, instr, dst, src) |
| def | xchg (arg1, arg2) |
| def | movzx (_, instr, dst, src) |
| def | movsx (_, instr, dst, src) |
| def | lea (_, instr, dst, src) |
| def | add (_, instr, dst, src) |
| def | xadd (_, instr, dst, src) |
| def | adc (_, instr, dst, src) |
| def | sub (_, instr, dst, src) |
| def | sbb (_, instr, dst, src) |
| def | neg (_, instr, src) |
| def | l_not (_, instr, dst) |
| def | l_cmp (_, instr, dst, src) |
| def | xor (_, instr, dst, src) |
| def | pxor (_, instr, dst, src) |
| def | l_or (_, instr, dst, src) |
| def | l_and (_, instr, dst, src) |
| def | l_test (_, instr, dst, src) |
| def | get_shift (dst, src) |
| def | l_rol (ir, instr, dst, src) |
| def | l_ror (ir, instr, dst, src) |
| def | rotate_with_carry_tpl (ir, instr, op, dst, src) |
| def | rcl (ir, instr, dst, src) |
| def | rcr (ir, instr, dst, src) |
| def | sar (ir, instr, dst, src) |
| def | shr (ir, instr, dst, src) |
| def | shrd (ir, instr, dst, src1, src2) |
| def | shl (ir, instr, dst, src) |
| def | shld (ir, instr, dst, src1, src2) |
| def | cmc (_, instr) |
| def | clc (_, instr) |
| def | stc (_, instr) |
| def | cld (_, instr) |
| def | std (_, instr) |
| def | cli (_, instr) |
| def | sti (_, instr) |
| def | inc (_, instr, dst) |
| def | dec (_, instr, dst) |
| def | push_gen (ir, instr, src, size) |
| def | push (ir, instr, src) |
| def | pushw (ir, instr, src) |
| def | pop_gen (ir, instr, src, size) |
| def | pop (ir, instr, src) |
| def | popw (ir, instr, src) |
| def | sete (_, instr, dst) |
| def | setnz (_, instr, dst) |
| def | setl (_, instr, dst) |
| def | setg (_, instr, dst) |
| def | setge (_, instr, dst) |
| def | seta (_, instr, dst) |
| def | setae (_, instr, dst) |
| def | setb (_, instr, dst) |
| def | setbe (_, instr, dst) |
| def | setns (_, instr, dst) |
| def | sets (_, instr, dst) |
| def | seto (_, instr, dst) |
| def | setp (_, instr, dst) |
| def | setnp (_, instr, dst) |
| def | setle (_, instr, dst) |
| def | setna (_, instr, dst) |
| def | setnbe (_, instr, dst) |
| def | setno (_, instr, dst) |
| def | setnb (_, instr, dst) |
| def | setalc (_, instr) |
| def | bswap (_, instr, dst) |
| def | cmps (ir, instr, size) |
| def | scas (ir, instr, size) |
| def | compose_eflag (s=32) |
| def | pushfd (ir, instr) |
| def | pushfq (ir, instr) |
| def | pushfw (ir, instr) |
| def | popfd (ir, instr) |
| def | popfw (ir, instr) |
| def | pusha_gen (ir, instr, size) |
| def | pusha (ir, instr) |
| def | pushad (ir, instr) |
| def | popa_gen (ir, instr, size) |
| def | popa (ir, instr) |
| def | popad (ir, instr) |
| def | call (ir, instr, dst) |
| def | ret (ir, instr, src=None) |
| def | retf (ir, instr, src=None) |
| def | leave (ir, instr) |
| def | enter (ir, instr, src1, src2) |
| def | jmp (ir, instr, dst) |
| def | jz (ir, instr, dst) |
| def | jcxz (ir, instr, dst) |
| def | jecxz (ir, instr, dst) |
| def | jrcxz (ir, instr, dst) |
| def | jnz (ir, instr, dst) |
| def | jp (ir, instr, dst) |
| def | jnp (ir, instr, dst) |
| def | ja (ir, instr, dst) |
| def | jae (ir, instr, dst) |
| def | jb (ir, instr, dst) |
| def | jbe (ir, instr, dst) |
| def | jge (ir, instr, dst) |
| def | jg (ir, instr, dst) |
| def | jl (ir, instr, dst) |
| def | jle (ir, instr, dst) |
| def | js (ir, instr, dst) |
| def | jns (ir, instr, dst) |
| def | jo (ir, instr, dst) |
| def | jno (ir, instr, dst) |
| def | loop (ir, instr, dst) |
| def | loopne (ir, instr, dst) |
| def | loope (ir, instr, dst) |
| def | div (ir, instr, src1) |
| def | idiv (ir, instr, src1) |
| def | mul (_, instr, src1) |
| def | imul (_, instr, src1, src2=None, src3=None) |
| def | cbw (_, instr) |
| def | cwde (_, instr) |
| def | cdqe (_, instr) |
| def | cwd (_, instr) |
| def | cdq (_, instr) |
| def | cqo (_, instr) |
| def | stos (ir, instr, size) |
| def | lods (ir, instr, size) |
| def | movs (ir, instr, size) |
| def | movsd (_, instr, dst, src) |
| def | movsd_dispatch (ir, instr, dst=None, src=None) |
| def | float_prev (flt, popcount=1) |
| def | float_pop (avoid_flt=None, popcount=1) |
| def | fcom (_, instr, dst=None, src=None) |
| def | ftst (_, instr) |
| def | fxam (ir, instr) |
| def | ficom (_, instr, dst, src=None) |
| def | fcomi (_, instr, dst=None, src=None) |
| def | fcomip (ir, instr, dst=None, src=None) |
| def | fucomi (ir, instr, dst=None, src=None) |
| def | fucomip (ir, instr, dst=None, src=None) |
| def | fcomp (ir, instr, dst=None, src=None) |
| def | fcompp (ir, instr, dst=None, src=None) |
| def | ficomp (ir, instr, dst, src=None) |
| def | fucom (ir, instr, dst=None, src=None) |
| def | fucomp (ir, instr, dst=None, src=None) |
| def | fucompp (ir, instr, dst=None, src=None) |
| def | comiss (_, instr, dst, src) |
| def | comisd (_, instr, dst, src) |
| def | fld (_, instr, src) |
| def | fst (_, instr, dst) |
| def | fstp (ir, instr, dst) |
| def | fist (_, instr, dst) |
| def | fistp (ir, instr, dst) |
| def | fisttp (_, instr, dst) |
| def | fild (ir, instr, src) |
| def | fldz (ir, instr) |
| def | fld1 (ir, instr) |
| def | fldl2t (ir, instr) |
| def | fldpi (ir, instr) |
| def | fldln2 (ir, instr) |
| def | fldl2e (ir, instr) |
| def | fldlg2 (ir, instr) |
| def | fadd (_, instr, dst, src=None) |
| def | fiadd (_, instr, dst, src=None) |
| def | fisub (_, instr, dst, src=None) |
| def | fisubr (_, instr, dst, src=None) |
| def | fpatan (_, instr) |
| def | fprem (_, instr) |
| def | fprem1 (_, instr) |
| def | faddp (_, instr, dst, src=None) |
| def | fninit (_, instr) |
| def | fyl2x (_, instr) |
| def | fnstenv (ir, instr, dst) |
| def | fldenv (ir, instr, src) |
| def | fsub (_, instr, dst, src=None) |
| def | fsubp (_, instr, dst, src=None) |
| def | fsubr (_, instr, dst, src=None) |
| def | fsubrp (_, instr, dst, src=None) |
| def | fmul (_, instr, dst, src=None) |
| def | fimul (_, instr, dst, src=None) |
| def | fdiv (_, instr, dst, src=None) |
| def | fdivr (_, instr, dst, src=None) |
| def | fdivrp (_, instr, dst, src=None) |
| def | fidiv (_, instr, dst, src=None) |
| def | fidivr (_, instr, dst, src=None) |
| def | fdivp (_, instr, dst, src=None) |
| def | fmulp (_, instr, dst, src=None) |
| def | ftan (_, instr, src) |
| def | fxch (_, instr, src) |
| def | fptan (_, instr) |
| def | frndint (_, instr) |
| def | fsin (_, instr) |
| def | fcos (_, instr) |
| def | fsincos (_, instr) |
| def | fscale (_, instr) |
| def | f2xm1 (_, instr) |
| def | fchs (_, instr) |
| def | fsqrt (_, instr) |
| def | fabs (_, instr) |
| def | fnstsw (_, instr, dst) |
| def | fnstcw (_, instr, dst) |
| def | fldcw (_, instr, src) |
| def | fwait (_, instr) |
| def | fcmovb (ir, instr, arg1, arg2) |
| def | fcmove (ir, instr, arg1, arg2) |
| def | fcmovbe (ir, instr, arg1, arg2) |
| def | fcmovu (ir, instr, arg1, arg2) |
| def | fcmovnb (ir, instr, arg1, arg2) |
| def | fcmovne (ir, instr, arg1, arg2) |
| def | fcmovnbe (ir, instr, arg1, arg2) |
| def | fcmovnu (ir, instr, arg1, arg2) |
| def | nop (_, instr, a=None) |
| def | prefetch0 (_, instr, src=None) |
| def | prefetch1 (_, instr, src=None) |
| def | prefetch2 (_, instr, src=None) |
| def | prefetchw (_, instr, src=None) |
| def | prefetchnta (_, instr, src=None) |
| def | lfence (_, instr, src=None) |
| def | mfence (_, instr, src=None) |
| def | sfence (_, instr, src=None) |
| def | ud2 (_, instr, src=None) |
| def | hlt (_, instr) |
| def | rdtsc (_, instr) |
| def | daa (_, instr) |
| def | das (_, instr) |
| def | aam (ir, instr, src) |
| def | aad (_, instr, src) |
| def | aaa (ir, instr) |
| def | aas (ir, instr) |
| def | bsr_bsf (ir, instr, dst, src, op_func) |
| def | bsf (ir, instr, dst, src) |
| def | bsr (ir, instr, dst, src) |
| def | arpl (_, instr, dst, src) |
| def | ins (_, instr, size) |
| def | sidt (ir, instr, dst) |
| def | sldt (_, instr, dst) |
| def | cmovz (ir, instr, dst, src) |
| def | cmovnz (ir, instr, dst, src) |
| def | cmovpe (ir, instr, dst, src) |
| def | cmovnp (ir, instr, dst, src) |
| def | cmovge (ir, instr, dst, src) |
| def | cmovg (ir, instr, dst, src) |
| def | cmovl (ir, instr, dst, src) |
| def | cmovle (ir, instr, dst, src) |
| def | cmova (ir, instr, dst, src) |
| def | cmovae (ir, instr, dst, src) |
| def | cmovbe (ir, instr, dst, src) |
| def | cmovb (ir, instr, dst, src) |
| def | cmovo (ir, instr, dst, src) |
| def | cmovno (ir, instr, dst, src) |
| def | cmovs (ir, instr, dst, src) |
| def | cmovns (ir, instr, dst, src) |
| def | icebp (_, instr) |
| def | l_int (_, instr, src) |
| def | l_sysenter (_, instr) |
| def | l_syscall (_, instr) |
| def | l_out (_, instr, src1, src2) |
| def | l_outs (_, instr, size) |
| def | xlat (ir, instr) |
| def | cpuid (_, instr) |
| def | bittest_get (ir, instr, src, index) |
| def | bt (ir, instr, src, index) |
| def | btc (ir, instr, src, index) |
| def | bts (ir, instr, src, index) |
| def | btr (ir, instr, src, index) |
| def | into (_, instr) |
| def | l_in (_, instr, src1, src2) |
| def | cmpxchg (arg1, arg2) |
| def | cmpxchg8b (arg1) |
| def | cmpxchg16b (arg1) |
| def | lds (ir, instr, dst, src) |
| def | les (ir, instr, dst, src) |
| def | lss (ir, instr, dst, src) |
| def | lfs (ir, instr, dst, src) |
| def | lgs (ir, instr, dst, src) |
| def | lahf (_, instr) |
| def | sahf (_, instr) |
| def | lar (_, instr, dst, src) |
| def | lsl (_, instr, dst, src) |
| def | fclex (_, instr) |
| def | fnclex (_, instr) |
| def | l_str (_, instr, dst) |
| def | movd (_, instr, dst, src) |
| def | movdqu (_, instr, dst, src) |
| def | movapd (_, instr, dst, src) |
| def | andps (_, instr, dst, src) |
| def | andnps (_, instr, dst, src) |
| def | orps (_, instr, dst, src) |
| def | xorps (_, instr, dst, src) |
| def | rdmsr (ir, instr) |
| def | wrmsr (ir, instr) |
| def | vec_op_clip (op, size, callback=None) |
| def | vec_vertical_sem (op, elt_size, reg_size, dst, src, apply_on_output) |
| def | vec_vertical_instr (op, elt_size, apply_on_output=lambda x:x) |
| def | pmuludq (ir, instr, dst, src) |
| def | pmaddwd (ir, instr, dst, src) |
| def | psadbw (ir, instr, dst, src) |
| def | pand (_, instr, dst, src) |
| def | pandn (_, instr, dst, src) |
| def | por (_, instr, dst, src) |
| def | cvtdq2pd (_, instr, dst, src) |
| def | cvtdq2ps (_, instr, dst, src) |
| def | cvtpd2dq (_, instr, dst, src) |
| def | cvtpd2pi (_, instr, dst, src) |
| def | cvtpd2ps (_, instr, dst, src) |
| def | cvtpi2pd (_, instr, dst, src) |
| def | cvtpi2ps (_, instr, dst, src) |
| def | cvtps2dq (_, instr, dst, src) |
| def | cvtps2pd (_, instr, dst, src) |
| def | cvtps2pi (_, instr, dst, src) |
| def | cvtsd2si (_, instr, dst, src) |
| def | cvtsd2ss (_, instr, dst, src) |
| def | cvtsi2sd (_, instr, dst, src) |
| def | cvtsi2ss (_, instr, dst, src) |
| def | cvtss2sd (_, instr, dst, src) |
| def | cvtss2si (_, instr, dst, src) |
| def | cvttpd2pi (_, instr, dst, src) |
| def | cvttpd2dq (_, instr, dst, src) |
| def | cvttsd2si (_, instr, dst, src) |
| def | cvttps2dq (_, instr, dst, src) |
| def | cvttps2pi (_, instr, dst, src) |
| def | cvttss2si (_, instr, dst, src) |
| def | movss (_, instr, dst, src) |
| def | ucomiss (_, instr, src1, src2) |
| def | ucomisd (_, instr, src1, src2) |
| def | pshufb (_, instr, dst, src) |
| def | pshufd (_, instr, dst, src, imm) |
| def | pshuflw (_, instr, dst, src, imm) |
| def | pshufhw (_, instr, dst, src, imm) |
| def | ps_rl_ll (ir, instr, dst, src, op, size) |
| def | psrlw (ir, instr, dst, src) |
| def | psrld (ir, instr, dst, src) |
| def | psrlq (ir, instr, dst, src) |
| def | psllw (ir, instr, dst, src) |
| def | pslld (ir, instr, dst, src) |
| def | psllq (ir, instr, dst, src) |
| def | psraw (ir, instr, dst, src) |
| def | psrad (ir, instr, dst, src) |
| def | pslldq (_, instr, dst, src) |
| def | psrldq (_, instr, dst, src) |
| def | iret (ir, instr) |
| def | pcmpeq (_, instr, dst, src, size) |
| def | pcmpgt (_, instr, dst, src, size) |
| def | pcmpeqb (ir, instr, dst, src) |
| def | pcmpeqw (ir, instr, dst, src) |
| def | pcmpeqd (ir, instr, dst, src) |
| def | pcmpeqq (ir, instr, dst, src) |
| def | pcmpgtb (ir, instr, dst, src) |
| def | pcmpgtw (ir, instr, dst, src) |
| def | pcmpgtd (ir, instr, dst, src) |
| def | pcmpgtq (ir, instr, dst, src) |
| def | punpck (_, instr, dst, src, size, off) |
| def | punpckhbw (ir, instr, dst, src) |
| def | punpckhwd (ir, instr, dst, src) |
| def | punpckhdq (ir, instr, dst, src) |
| def | punpckhqdq (ir, instr, dst, src) |
| def | punpcklbw (ir, instr, dst, src) |
| def | punpcklwd (ir, instr, dst, src) |
| def | punpckldq (ir, instr, dst, src) |
| def | punpcklqdq (ir, instr, dst, src) |
| def | pinsr (_, instr, dst, src, imm, size) |
| def | pinsrb (ir, instr, dst, src, imm) |
| def | pinsrw (ir, instr, dst, src, imm) |
| def | pinsrd (ir, instr, dst, src, imm) |
| def | pinsrq (ir, instr, dst, src, imm) |
| def | pextr (_, instr, dst, src, imm, size) |
| def | pextrb (ir, instr, dst, src, imm) |
| def | pextrw (ir, instr, dst, src, imm) |
| def | pextrd (ir, instr, dst, src, imm) |
| def | pextrq (ir, instr, dst, src, imm) |
| def | unpckhps (_, instr, dst, src) |
| def | unpckhpd (_, instr, dst, src) |
| def | unpcklps (_, instr, dst, src) |
| def | unpcklpd (_, instr, dst, src) |
| def | movlpd (_, instr, dst, src) |
| def | movlps (_, instr, dst, src) |
| def | movhpd (_, instr, dst, src) |
| def | movlhps (_, instr, dst, src) |
| def | movhlps (_, instr, dst, src) |
| def | movdq2q (_, instr, dst, src) |
| def | movq2dq (_, instr, dst, src) |
| def | sqrt_gen (_, instr, dst, src, size) |
| def | sqrtpd (ir, instr, dst, src) |
| def | sqrtps (ir, instr, dst, src) |
| def | sqrtsd (_, instr, dst, src) |
| def | sqrtss (_, instr, dst, src) |
| def | pmovmskb (_, instr, dst, src) |
| def | smsw (ir, instr, dst) |
| def | bndmov (ir, instr, dst, src) |
| def | palignr (ir, instr, dst, src, imm) |
| def | packsswb (ir, instr, dst, src) |
| def | packssdw (ir, instr, dst, src) |
| def | packuswb (ir, instr, dst, src) |
| def | maskmovq (ir, instr, src, mask) |
| def | emms (ir, instr) |
| def | incssp (ir, instr, dst) |
| def | rdssp (ir, instr, dst) |
| def | saveprevssp (ir, instr) |
| def | rstorssp (ir, instr, dst) |
| def | wrss (ir, instr, src, dst) |
| def | wruss (ir, instr, src, dst) |
| def | setssbsy (ir, instr) |
| def | clrssbsy (ir, instr, dst) |
| def | endbr64 (ir, instr) |
| def | endbr32 (ir, instr) |
| def | stmxcsr (ir, instr, dst) |
| def | ldmxcsr (ir, instr, dst) |
| def | shufps (ir, instr, dst, src, imm8) |
| def | shufpd (ir, instr, dst, src, imm8) |
| def | movmskps (ir, instr, dst, src) |
| def | movmskpd (ir, instr, dst, src) |
| def | roundss (ir, inst, dst, src, imm8) |
| def | roundsd (ir, inst, dst, src, imm8) |
| def | fxsave (_ir, _instr, _src) |
| def | fxrstor (_ir, _instr, _dst) |
Variables | |
| LOG_X86_SEM = logging.getLogger("x86_sem") | |
| CONSOLE_HANDLER = logging.StreamHandler() | |
| dictionary | ctx |
| sbuild = SemBuilder(ctx) | |
| list | pa_regs |
| def | paddb = vec_vertical_instr('+', 8) |
| def | paddw = vec_vertical_instr('+', 16) |
| def | paddd = vec_vertical_instr('+', 32) |
| def | paddq = vec_vertical_instr('+', 64) |
| def | psubb = vec_vertical_instr('-', 8) |
| def | psubw = vec_vertical_instr('-', 16) |
| def | psubd = vec_vertical_instr('-', 32) |
| def | psubq = vec_vertical_instr('-', 64) |
| def | pmullb = vec_vertical_instr('*', 8) |
| def | pmullw = vec_vertical_instr('*', 16) |
| def | pmulld = vec_vertical_instr('*', 32) |
| def | pmullq = vec_vertical_instr('*', 64) |
| def | pmulhub = vec_vertical_instr('*', 8, _keep_mul_high) |
| def | pmulhuw = vec_vertical_instr('*', 16, _keep_mul_high) |
| def | pmulhud = vec_vertical_instr('*', 32, _keep_mul_high) |
| def | pmulhuq = vec_vertical_instr('*', 64, _keep_mul_high) |
| def | pmulhb = vec_vertical_instr('*', 8, lambda x: _keep_mul_high(x, signed=True)) |
| def | pmulhw = vec_vertical_instr('*', 16, lambda x: _keep_mul_high(x, signed=True)) |
| def | pmulhd = vec_vertical_instr('*', 32, lambda x: _keep_mul_high(x, signed=True)) |
| def | pmulhq = vec_vertical_instr('*', 64, lambda x: _keep_mul_high(x, signed=True)) |
| def | pavgb = vec_vertical_instr('avg', 8, _average) |
| def | pavgw = vec_vertical_instr('avg', 16, _average) |
| def | pminsw = vec_vertical_instr('min', 16, lambda x: _min_max(x, signed=True)) |
| def | pminub = vec_vertical_instr('min', 8, lambda x: _min_max(x, signed=False)) |
| def | pminuw = vec_vertical_instr('min', 16, lambda x: _min_max(x, signed=False)) |
| def | pminud = vec_vertical_instr('min', 32, lambda x: _min_max(x, signed=False)) |
| def | pmaxub = vec_vertical_instr('max', 8, lambda x: _min_max(x, signed=False)) |
| def | pmaxuw = vec_vertical_instr('max', 16, lambda x: _min_max(x, signed=False)) |
| def | pmaxud = vec_vertical_instr('max', 32, lambda x: _min_max(x, signed=False)) |
| def | pmaxsw = vec_vertical_instr('max', 16, lambda x: _min_max(x, signed=True)) |
| def | addss = vec_op_clip('fadd', 32) |
| def | addsd = vec_op_clip('fadd', 64) |
| def | addps = vec_vertical_instr('fadd', 32) |
| def | addpd = vec_vertical_instr('fadd', 64) |
| def | subss = vec_op_clip('fsub', 32) |
| def | subsd = vec_op_clip('fsub', 64) |
| def | subps = vec_vertical_instr('fsub', 32) |
| def | subpd = vec_vertical_instr('fsub', 64) |
| def | mulss = vec_op_clip('fmul', 32) |
| def | mulsd = vec_op_clip('fmul', 64) |
| def | mulps = vec_vertical_instr('fmul', 32) |
| def | mulpd = vec_vertical_instr('fmul', 64) |
| def | divss = vec_op_clip('fdiv', 32) |
| def | divsd = vec_op_clip('fdiv', 64) |
| def | divps = vec_vertical_instr('fdiv', 32) |
| def | divpd = vec_vertical_instr('fdiv', 64) |
| def | minps = vec_vertical_instr('fmin', 32, _float_min_max) |
| def | minpd = vec_vertical_instr('fmin', 64, _float_min_max) |
| def | minss = vec_op_clip('fmin', 32, _float_min_max) |
| def | minsd = vec_op_clip('fmin', 64, _float_min_max) |
| def | maxps = vec_vertical_instr('fmax', 32, _float_min_max) |
| def | maxpd = vec_vertical_instr('fmax', 64, _float_min_max) |
| def | maxss = vec_op_clip('fmax', 32, _float_min_max) |
| def | maxsd = vec_op_clip('fmax', 64, _float_min_max) |
| def | cmpeqps = vec_vertical_instr('==fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpeqpd = vec_vertical_instr('==fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpeqss = vec_op_clip('==fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpeqsd = vec_op_clip('==fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpltps = vec_vertical_instr('<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpltpd = vec_vertical_instr('<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpltss = vec_op_clip('<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpltsd = vec_op_clip('<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpleps = vec_vertical_instr('<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmplepd = vec_vertical_instr('<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpless = vec_op_clip('<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmplesd = vec_op_clip('<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpunordps = vec_vertical_instr('unord', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpunordpd = vec_vertical_instr('unord', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpunordss = vec_op_clip('unord', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpunordsd = vec_op_clip('unord', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpneqps = vec_vertical_instr('!=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpneqpd = vec_vertical_instr('!=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpneqss = vec_op_clip('!=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpneqsd = vec_op_clip('!=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpnltps = vec_vertical_instr('!<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpnltpd = vec_vertical_instr('!<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpnltss = vec_op_clip('!<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpnltsd = vec_op_clip('!<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpnleps = vec_vertical_instr('!<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpnlepd = vec_vertical_instr('!<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpnless = vec_op_clip('!<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpnlesd = vec_op_clip('!<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpordps = vec_vertical_instr('ord', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpordpd = vec_vertical_instr('ord', 64, lambda x: _float_compare_to_mask(x)) |
| def | cmpordss = vec_op_clip('ord', 32, lambda x: _float_compare_to_mask(x)) |
| def | cmpordsd = vec_op_clip('ord', 64, lambda x: _float_compare_to_mask(x)) |
| def | psubusb = vec_vertical_instr('-', 8, _saturation_sub_unsigned) |
| def | psubusw = vec_vertical_instr('-', 16, _saturation_sub_unsigned) |
| def | paddusb = vec_vertical_instr('+', 8, _saturation_add) |
| def | paddusw = vec_vertical_instr('+', 16, _saturation_add) |
| def | psubsb = vec_vertical_instr('-', 8, _saturation_sub_signed) |
| def | psubsw = vec_vertical_instr('-', 16, _saturation_sub_signed) |
| def | paddsb = vec_vertical_instr('+', 8, _saturation_add_signed) |
| def | paddsw = vec_vertical_instr('+', 16, _saturation_add_signed) |
| int | STMXCSR_VALUE = 0x1fa0 |
| dictionary | mnemo_func |
| def miasm.arch.x86.sem.aaa | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.aad | ( | _, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.aam | ( | ir, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.aas | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.adc | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.add | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.andnps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.andps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.arith_flag | ( | a, | |
| b, | |||
| c | |||
| ) |

| def miasm.arch.x86.sem.arpl | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.bittest_get | ( | ir, | |
| instr, | |||
| src, | |||
| index | |||
| ) |


| def miasm.arch.x86.sem.bndmov | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.bsf | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.bsr | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.bsr_bsf | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| op_func | |||
| ) |
IF SRC == 0
ZF = 1
DEST is left unchanged
ELSE
ZF = 0
DEST = @op_func(SRC)

| def miasm.arch.x86.sem.bswap | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.bt | ( | ir, | |
| instr, | |||
| src, | |||
| index | |||
| ) |

| def miasm.arch.x86.sem.btc | ( | ir, | |
| instr, | |||
| src, | |||
| index | |||
| ) |

| def miasm.arch.x86.sem.btr | ( | ir, | |
| instr, | |||
| src, | |||
| index | |||
| ) |

| def miasm.arch.x86.sem.bts | ( | ir, | |
| instr, | |||
| src, | |||
| index | |||
| ) |

| def miasm.arch.x86.sem.call | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.cbw | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cdq | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cdqe | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.check_ops_msb | ( | a, | |
| b, | |||
| c | |||
| ) |

| def miasm.arch.x86.sem.clc | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cld | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cli | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.clrssbsy | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.cmc | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cmova | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovae | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovb | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovbe | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovg | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovge | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovl | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovle | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovno | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovnp | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovns | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovnz | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovo | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovpe | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovs | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmovz | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.cmps | ( | ir, | |
| instr, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.cmpxchg | ( | arg1, | |
| arg2 | |||
| ) |
| def miasm.arch.x86.sem.cmpxchg16b | ( | arg1 | ) |
| def miasm.arch.x86.sem.cmpxchg8b | ( | arg1 | ) |
| def miasm.arch.x86.sem.comisd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.comiss | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.compose_eflag | ( | s = 32 | ) |

| def miasm.arch.x86.sem.cpuid | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cqo | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cvtdq2pd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtdq2ps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtpd2dq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtpd2pi | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtpd2ps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtpi2pd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtpi2ps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtps2dq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtps2pd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtps2pi | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtsd2si | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtsd2ss | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtsi2sd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtsi2ss | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtss2sd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvtss2si | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvttpd2dq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvttpd2pi | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvttps2dq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvttps2pi | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvttsd2si | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cvttss2si | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.cwd | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.cwde | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.daa | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.das | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.dec | ( | _, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.div | ( | ir, | |
| instr, | |||
| src1 | |||
| ) |
| def miasm.arch.x86.sem.emms | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.endbr32 | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.endbr64 | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.enter | ( | ir, | |
| instr, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.expraddr | ( | mode, | |
| ptr | |||
| ) |
Returns memory address pointer with size according to current @mode


| def miasm.arch.x86.sem.f2xm1 | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fabs | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fadd | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.faddp | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fchs | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fclex | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.fcmovb | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmovbe | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmove | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmovnb | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmovnbe | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmovne | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmovnu | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcmovu | ( | ir, | |
| instr, | |||
| arg1, | |||
| arg2 | |||
| ) |

| def miasm.arch.x86.sem.fcom | ( | _, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |


| def miasm.arch.x86.sem.fcomi | ( | _, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |


| def miasm.arch.x86.sem.fcomip | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |


| def miasm.arch.x86.sem.fcomp | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |


| def miasm.arch.x86.sem.fcompp | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |


| def miasm.arch.x86.sem.fcos | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fdiv | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fdivp | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fdivr | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fdivrp | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fiadd | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.ficom | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |


| def miasm.arch.x86.sem.ficomp | ( | ir, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fidiv | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fidivr | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fild | ( | ir, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.fimul | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fist | ( | _, | |
| instr, | |||
| dst | |||
| ) |


| def miasm.arch.x86.sem.fistp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.fisttp | ( | _, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.fisub | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fisubr | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fix_mem_args_size | ( | instr, | |
| * | args | ||
| ) |


| def miasm.arch.x86.sem.fld | ( | _, | |
| instr, | |||
| src | |||
| ) |


| def miasm.arch.x86.sem.fld1 | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fldcw | ( | _, | |
| instr, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.fldenv | ( | ir, | |
| instr, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.fldl2e | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fldl2t | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fldlg2 | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fldln2 | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fldpi | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fldz | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.float_implicit_st0 | ( | arg1, | |
| arg2 | |||
| ) |
Generate full float operators if one argument is implicit (float_st0)

| def miasm.arch.x86.sem.float_pop | ( | avoid_flt = None, |
|
popcount = 1 |
|||
| ) |
Generate floatpop semantic (@popcount times), avoiding the avoid_flt@ float @avoid_flt: float avoided in the generated semantic @popcount: pop count


| def miasm.arch.x86.sem.float_prev | ( | flt, | |
popcount = 1 |
|||
| ) |

| def miasm.arch.x86.sem.fmul | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fmulp | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fnclex | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.fninit | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fnstcw | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.fnstenv | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.fnstsw | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.fpatan | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fprem | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fprem1 | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fptan | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.frndint | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fscale | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fsin | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fsincos | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.fsqrt | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fst | ( | _, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.fstp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.fsub | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fsubp | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fsubr | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fsubrp | ( | _, | |
| instr, | |||
| dst, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.ftan | ( | _, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.ftst | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.fucom | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fucomi | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fucomip | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fucomp | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fucompp | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.fwait | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.fxam | ( | ir, | |
| instr | |||
| ) |
NaN:
C3, C2, C0 = 001;
Normal:
C3, C2, C0 = 010;
Infinity:
C3, C2, C0 = 011;
Zero:
C3, C2, C0 = 100;
Empty:
C3, C2, C0 = 101;
Denormal:
C3, C2, C0 = 110;
C1 = sign bit of ST; (* 0 for positive, 1 for negative *)

| def miasm.arch.x86.sem.fxch | ( | _, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.fxrstor | ( | _ir, | |
| _instr, | |||
| _dst | |||
| ) |
| def miasm.arch.x86.sem.fxsave | ( | _ir, | |
| _instr, | |||
| _src | |||
| ) |
| def miasm.arch.x86.sem.fyl2x | ( | _, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.gen_cmov | ( | ir, | |
| instr, | |||
| cond, | |||
| dst, | |||
| src, | |||
| mov_if | |||
| ) |
Generate cmov @ir: ir instance @instr: instruction instance @cond: condition @mov_if: invert condition if False


| def miasm.arch.x86.sem.gen_fcmov | ( | ir, | |
| instr, | |||
| cond, | |||
| arg1, | |||
| arg2, | |||
| mov_if | |||
| ) |
Generate fcmov @ir: ir instance @instr: instruction instance @cond: condition @mov_if: invert condition if False

| def miasm.arch.x86.sem.gen_jcc | ( | ir, | |
| instr, | |||
| cond, | |||
| dst, | |||
| jmp_if | |||
| ) |
Macro to generate jcc semantic @ir: ir instance @instr: instruction @cond: condition of the jcc @dst: the destination if jcc is taken @jmp_if: jump if/notif cond

| def miasm.arch.x86.sem.get_shift | ( | dst, | |
| src | |||
| ) |

| def miasm.arch.x86.sem.hlt | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.icebp | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.idiv | ( | ir, | |
| instr, | |||
| src1 | |||
| ) |
| def miasm.arch.x86.sem.imul | ( | _, | |
| instr, | |||
| src1, | |||
src2 = None, |
|||
src3 = None |
|||
| ) |
| def miasm.arch.x86.sem.inc | ( | _, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.incssp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.ins | ( | _, | |
| instr, | |||
| size | |||
| ) |
| def miasm.arch.x86.sem.instr2addrsize | ( | instr | ) |
Returns the address size for a given @instr

| def miasm.arch.x86.sem.into | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.iret | ( | ir, | |
| instr | |||
| ) |
IRET implementation XXX: only support "no-privilege change"

| def miasm.arch.x86.sem.ja | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jae | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jb | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jbe | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jcxz | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jecxz | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jg | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jge | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jl | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jle | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jmp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.jno | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jnp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jns | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jnz | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jo | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jrcxz | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.js | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.jz | ( | ir, | |
| instr, | |||
| dst | |||
| ) |

| def miasm.arch.x86.sem.l_and | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.l_cmp | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |


| def miasm.arch.x86.sem.l_in | ( | _, | |
| instr, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.l_int | ( | _, | |
| instr, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.l_not | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.l_or | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.l_out | ( | _, | |
| instr, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.l_outs | ( | _, | |
| instr, | |||
| size | |||
| ) |
| def miasm.arch.x86.sem.l_rol | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.l_ror | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.l_str | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.l_syscall | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.l_sysenter | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.l_test | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.lahf | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.lar | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.ldmxcsr | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.lds | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.lea | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.leave | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.les | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.lfence | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.lfs | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.lgs | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.lods | ( | ir, | |
| instr, | |||
| size | |||
| ) |
| def miasm.arch.x86.sem.loop | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.loope | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.loopne | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.lsl | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.lss | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.maskmovq | ( | ir, | |
| instr, | |||
| src, | |||
| mask | |||
| ) |
| def miasm.arch.x86.sem.mem2double | ( | instr, | |
| arg | |||
| ) |
Add float conversion if argument is an ExprMem @arg: argument to transform


| def miasm.arch.x86.sem.mfence | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.mode2addrsize | ( | mode | ) |
Returns the address size for a given @mode

| def miasm.arch.x86.sem.mov | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.movapd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movdq2q | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movdqu | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movhlps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movhpd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movlhps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movlpd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movlps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movmskpd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movmskps | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movq2dq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movs | ( | ir, | |
| instr, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.movsd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.movsd_dispatch | ( | ir, | |
| instr, | |||
dst = None, |
|||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.movss | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movsx | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.movzx | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.mul | ( | _, | |
| instr, | |||
| src1 | |||
| ) |
| def miasm.arch.x86.sem.neg | ( | _, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.nop | ( | _, | |
| instr, | |||
a = None |
|||
| ) |
| def miasm.arch.x86.sem.null_flag_co | ( | ) |

| def miasm.arch.x86.sem.orps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.packssdw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.packsswb | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.packuswb | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.palignr | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |
| def miasm.arch.x86.sem.pand | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pandn | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pcmpeq | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.pcmpeqb | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpeqd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpeqq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpeqw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpgt | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.pcmpgtb | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpgtd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpgtq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pcmpgtw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pextr | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.pextrb | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pextrd | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pextrq | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pextrw | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pinsr | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.pinsrb | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pinsrd | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pinsrq | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pinsrw | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |

| def miasm.arch.x86.sem.pmaddwd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pmovmskb | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pmuludq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pop | ( | ir, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pop_gen | ( | ir, | |
| instr, | |||
| src, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.popa | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.popa_gen | ( | ir, | |
| instr, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.popad | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.popfd | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.popfw | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.popw | ( | ir, | |
| instr, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.por | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.prefetch0 | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.prefetch1 | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.prefetch2 | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.prefetchnta | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.prefetchw | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.ps_rl_ll | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| op, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.psadbw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pshufb | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.pshufd | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |
| def miasm.arch.x86.sem.pshufhw | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |
| def miasm.arch.x86.sem.pshuflw | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm | |||
| ) |
| def miasm.arch.x86.sem.pslld | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.pslldq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.psllq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.psllw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.psrad | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.psraw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.psrld | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.psrldq | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.psrlq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.psrlw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpck | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| size, | |||
| off | |||
| ) |

| def miasm.arch.x86.sem.punpckhbw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpckhdq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpckhqdq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpckhwd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpcklbw | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpckldq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpcklqdq | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.punpcklwd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.push | ( | ir, | |
| instr, | |||
| src | |||
| ) |


| def miasm.arch.x86.sem.push_gen | ( | ir, | |
| instr, | |||
| src, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.pusha | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.pusha_gen | ( | ir, | |
| instr, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.pushad | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.pushfd | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.pushfq | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.pushfw | ( | ir, | |
| instr | |||
| ) |

| def miasm.arch.x86.sem.pushw | ( | ir, | |
| instr, | |||
| src | |||
| ) |


| def miasm.arch.x86.sem.pxor | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.rcl | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.rcr | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.rdmsr | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.rdssp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.rdtsc | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.ret | ( | ir, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.retf | ( | ir, | |
| instr, | |||
src = None |
|||
| ) |

| def miasm.arch.x86.sem.rotate_with_carry_tpl | ( | ir, | |
| instr, | |||
| op, | |||
| dst, | |||
| src | |||
| ) |


| def miasm.arch.x86.sem.roundsd | ( | ir, | |
| inst, | |||
| dst, | |||
| src, | |||
| imm8 | |||
| ) |
| def miasm.arch.x86.sem.roundss | ( | ir, | |
| inst, | |||
| dst, | |||
| src, | |||
| imm8 | |||
| ) |
| def miasm.arch.x86.sem.rstorssp | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.sahf | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.sar | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.saveprevssp | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.sbb | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.scas | ( | ir, | |
| instr, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.set_float_cs_eip | ( | instr | ) |
| def miasm.arch.x86.sem.seta | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setae | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setalc | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.setb | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setbe | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.sete | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setg | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setge | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setl | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setle | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setna | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setnb | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setnbe | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setno | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setnp | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setns | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setnz | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.seto | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setp | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.sets | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.setssbsy | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.sfence | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.shl | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.shld | ( | ir, | |
| instr, | |||
| dst, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.shr | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.shrd | ( | ir, | |
| instr, | |||
| dst, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.shufpd | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm8 | |||
| ) |
| def miasm.arch.x86.sem.shufps | ( | ir, | |
| instr, | |||
| dst, | |||
| src, | |||
| imm8 | |||
| ) |
| def miasm.arch.x86.sem.sidt | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.sldt | ( | _, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.smsw | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.sqrt_gen | ( | _, | |
| instr, | |||
| dst, | |||
| src, | |||
| size | |||
| ) |

| def miasm.arch.x86.sem.sqrtpd | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.sqrtps | ( | ir, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.sqrtsd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.sqrtss | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.stc | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.std | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.sti | ( | _, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.stmxcsr | ( | ir, | |
| instr, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.stos | ( | ir, | |
| instr, | |||
| size | |||
| ) |
| def miasm.arch.x86.sem.sub | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.ucomisd | ( | _, | |
| instr, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.ucomiss | ( | _, | |
| instr, | |||
| src1, | |||
| src2 | |||
| ) |
| def miasm.arch.x86.sem.ud2 | ( | _, | |
| instr, | |||
src = None |
|||
| ) |
| def miasm.arch.x86.sem.unpckhpd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.unpckhps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.unpcklpd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.unpcklps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.update_flag_add_cf | ( | op1, | |
| op2, | |||
| res | |||
| ) |

| def miasm.arch.x86.sem.update_flag_add_of | ( | op1, | |
| op2, | |||
| res | |||
| ) |

| def miasm.arch.x86.sem.update_flag_addwc_cf | ( | op1, | |
| op2, | |||
| op3 | |||
| ) |

| def miasm.arch.x86.sem.update_flag_addwc_of | ( | op1, | |
| op2, | |||
| op3 | |||
| ) |

| def miasm.arch.x86.sem.update_flag_af | ( | op1, | |
| op2, | |||
| res | |||
| ) |

| def miasm.arch.x86.sem.update_flag_arith | ( | a | ) |


| def miasm.arch.x86.sem.update_flag_arith_add_co | ( | x, | |
| y, | |||
| z | |||
| ) |


| def miasm.arch.x86.sem.update_flag_arith_add_znp | ( | arg1, | |
| arg2 | |||
| ) |
Compute znp flags for (arg1 + arg2)


| def miasm.arch.x86.sem.update_flag_arith_addwc_co | ( | arg1, | |
| arg2, | |||
| arg3 | |||
| ) |


| def miasm.arch.x86.sem.update_flag_arith_addwc_znp | ( | arg1, | |
| arg2, | |||
| arg3 | |||
| ) |
Compute znp flags for (arg1 + arg2 + cf)


| def miasm.arch.x86.sem.update_flag_arith_sub_co | ( | x, | |
| y, | |||
| z | |||
| ) |


| def miasm.arch.x86.sem.update_flag_arith_sub_znp | ( | arg1, | |
| arg2 | |||
| ) |
Compute znp flags for (arg1 - arg2)


| def miasm.arch.x86.sem.update_flag_arith_subwc_co | ( | arg1, | |
| arg2, | |||
| arg3 | |||
| ) |


| def miasm.arch.x86.sem.update_flag_arith_subwc_znp | ( | arg1, | |
| arg2, | |||
| arg3 | |||
| ) |
Compute znp flags for (arg1 - (arg2 + cf))


| def miasm.arch.x86.sem.update_flag_nf | ( | arg | ) |

| def miasm.arch.x86.sem.update_flag_np | ( | result | ) |


| def miasm.arch.x86.sem.update_flag_pf | ( | a | ) |

| def miasm.arch.x86.sem.update_flag_sub_cf | ( | op1, | |
| op2, | |||
| res | |||
| ) |

| def miasm.arch.x86.sem.update_flag_sub_of | ( | op1, | |
| op2, | |||
| res | |||
| ) |

| def miasm.arch.x86.sem.update_flag_subwc_cf | ( | op1, | |
| op2, | |||
| op3 | |||
| ) |

| def miasm.arch.x86.sem.update_flag_subwc_of | ( | op1, | |
| op2, | |||
| op3 | |||
| ) |

| def miasm.arch.x86.sem.update_flag_zf | ( | a | ) |

| def miasm.arch.x86.sem.update_flag_zf_eq | ( | a, | |
| b | |||
| ) |

| def miasm.arch.x86.sem.update_flag_zfaddwc_eq | ( | arg1, | |
| arg2, | |||
| arg3 | |||
| ) |

| def miasm.arch.x86.sem.update_flag_zfsubwc_eq | ( | arg1, | |
| arg2, | |||
| arg3 | |||
| ) |

| def miasm.arch.x86.sem.update_flag_znp | ( | a | ) |


| def miasm.arch.x86.sem.vec_op_clip | ( | op, | |
| size, | |||
callback = None |
|||
| ) |
Generate simd operations @op: the operator @size: size of an element
| def miasm.arch.x86.sem.vec_vertical_instr | ( | op, | |
| elt_size, | |||
apply_on_output = lambda x: x |
|||
| ) |
| def miasm.arch.x86.sem.vec_vertical_sem | ( | op, | |
| elt_size, | |||
| reg_size, | |||
| dst, | |||
| src, | |||
| apply_on_output | |||
| ) |
| def miasm.arch.x86.sem.wrmsr | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.wrss | ( | ir, | |
| instr, | |||
| src, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.wruss | ( | ir, | |
| instr, | |||
| src, | |||
| dst | |||
| ) |
| def miasm.arch.x86.sem.xadd | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.xchg | ( | arg1, | |
| arg2 | |||
| ) |
| def miasm.arch.x86.sem.xlat | ( | ir, | |
| instr | |||
| ) |
| def miasm.arch.x86.sem.xor | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |

| def miasm.arch.x86.sem.xorps | ( | _, | |
| instr, | |||
| dst, | |||
| src | |||
| ) |
| def miasm.arch.x86.sem.addpd = vec_vertical_instr('fadd', 64) |
| def miasm.arch.x86.sem.addps = vec_vertical_instr('fadd', 32) |
| def miasm.arch.x86.sem.addsd = vec_op_clip('fadd', 64) |
| def miasm.arch.x86.sem.addss = vec_op_clip('fadd', 32) |
| def miasm.arch.x86.sem.cmpeqpd = vec_vertical_instr('==fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpeqps = vec_vertical_instr('==fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpeqsd = vec_op_clip('==fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpeqss = vec_op_clip('==fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmplepd = vec_vertical_instr('<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpleps = vec_vertical_instr('<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmplesd = vec_op_clip('<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpless = vec_op_clip('<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpltpd = vec_vertical_instr('<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpltps = vec_vertical_instr('<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpltsd = vec_op_clip('<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpltss = vec_op_clip('<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpneqpd = vec_vertical_instr('!=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpneqps = vec_vertical_instr('!=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpneqsd = vec_op_clip('!=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpneqss = vec_op_clip('!=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnlepd = vec_vertical_instr('!<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnleps = vec_vertical_instr('!<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnlesd = vec_op_clip('!<=fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnless = vec_op_clip('!<=fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnltpd = vec_vertical_instr('!<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnltps = vec_vertical_instr('!<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnltsd = vec_op_clip('!<fu', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpnltss = vec_op_clip('!<fu', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpordpd = vec_vertical_instr('ord', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpordps = vec_vertical_instr('ord', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpordsd = vec_op_clip('ord', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpordss = vec_op_clip('ord', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpunordpd = vec_vertical_instr('unord', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpunordps = vec_vertical_instr('unord', 32, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpunordsd = vec_op_clip('unord', 64, lambda x: _float_compare_to_mask(x)) |
| def miasm.arch.x86.sem.cmpunordss = vec_op_clip('unord', 32, lambda x: _float_compare_to_mask(x)) |
| miasm.arch.x86.sem.CONSOLE_HANDLER = logging.StreamHandler() |
| dictionary miasm.arch.x86.sem.ctx |
| def miasm.arch.x86.sem.divpd = vec_vertical_instr('fdiv', 64) |
| def miasm.arch.x86.sem.divps = vec_vertical_instr('fdiv', 32) |
| def miasm.arch.x86.sem.divsd = vec_op_clip('fdiv', 64) |
| def miasm.arch.x86.sem.divss = vec_op_clip('fdiv', 32) |
| miasm.arch.x86.sem.LOG_X86_SEM = logging.getLogger("x86_sem") |
| def miasm.arch.x86.sem.maxpd = vec_vertical_instr('fmax', 64, _float_min_max) |
| def miasm.arch.x86.sem.maxps = vec_vertical_instr('fmax', 32, _float_min_max) |
| def miasm.arch.x86.sem.maxsd = vec_op_clip('fmax', 64, _float_min_max) |
| def miasm.arch.x86.sem.maxss = vec_op_clip('fmax', 32, _float_min_max) |
| def miasm.arch.x86.sem.minpd = vec_vertical_instr('fmin', 64, _float_min_max) |
| def miasm.arch.x86.sem.minps = vec_vertical_instr('fmin', 32, _float_min_max) |
| def miasm.arch.x86.sem.minsd = vec_op_clip('fmin', 64, _float_min_max) |
| def miasm.arch.x86.sem.minss = vec_op_clip('fmin', 32, _float_min_max) |
| dictionary miasm.arch.x86.sem.mnemo_func |
| def miasm.arch.x86.sem.mulpd = vec_vertical_instr('fmul', 64) |
| def miasm.arch.x86.sem.mulps = vec_vertical_instr('fmul', 32) |
| def miasm.arch.x86.sem.mulsd = vec_op_clip('fmul', 64) |
| def miasm.arch.x86.sem.mulss = vec_op_clip('fmul', 32) |
| list miasm.arch.x86.sem.pa_regs |
| def miasm.arch.x86.sem.paddb = vec_vertical_instr('+', 8) |
| def miasm.arch.x86.sem.paddd = vec_vertical_instr('+', 32) |
| def miasm.arch.x86.sem.paddq = vec_vertical_instr('+', 64) |
| def miasm.arch.x86.sem.paddsb = vec_vertical_instr('+', 8, _saturation_add_signed) |
| def miasm.arch.x86.sem.paddsw = vec_vertical_instr('+', 16, _saturation_add_signed) |
| def miasm.arch.x86.sem.paddusb = vec_vertical_instr('+', 8, _saturation_add) |
| def miasm.arch.x86.sem.paddusw = vec_vertical_instr('+', 16, _saturation_add) |
| def miasm.arch.x86.sem.paddw = vec_vertical_instr('+', 16) |
| def miasm.arch.x86.sem.pavgb = vec_vertical_instr('avg', 8, _average) |
| def miasm.arch.x86.sem.pavgw = vec_vertical_instr('avg', 16, _average) |
| def miasm.arch.x86.sem.pmaxsw = vec_vertical_instr('max', 16, lambda x: _min_max(x, signed=True)) |
| def miasm.arch.x86.sem.pmaxub = vec_vertical_instr('max', 8, lambda x: _min_max(x, signed=False)) |
| def miasm.arch.x86.sem.pmaxud = vec_vertical_instr('max', 32, lambda x: _min_max(x, signed=False)) |
| def miasm.arch.x86.sem.pmaxuw = vec_vertical_instr('max', 16, lambda x: _min_max(x, signed=False)) |
| def miasm.arch.x86.sem.pminsw = vec_vertical_instr('min', 16, lambda x: _min_max(x, signed=True)) |
| def miasm.arch.x86.sem.pminub = vec_vertical_instr('min', 8, lambda x: _min_max(x, signed=False)) |
| def miasm.arch.x86.sem.pminud = vec_vertical_instr('min', 32, lambda x: _min_max(x, signed=False)) |
| def miasm.arch.x86.sem.pminuw = vec_vertical_instr('min', 16, lambda x: _min_max(x, signed=False)) |
| def miasm.arch.x86.sem.pmulhb = vec_vertical_instr('*', 8, lambda x: _keep_mul_high(x, signed=True)) |
| def miasm.arch.x86.sem.pmulhd = vec_vertical_instr('*', 32, lambda x: _keep_mul_high(x, signed=True)) |
| def miasm.arch.x86.sem.pmulhq = vec_vertical_instr('*', 64, lambda x: _keep_mul_high(x, signed=True)) |
| def miasm.arch.x86.sem.pmulhub = vec_vertical_instr('*', 8, _keep_mul_high) |
| def miasm.arch.x86.sem.pmulhud = vec_vertical_instr('*', 32, _keep_mul_high) |
| def miasm.arch.x86.sem.pmulhuq = vec_vertical_instr('*', 64, _keep_mul_high) |
| def miasm.arch.x86.sem.pmulhuw = vec_vertical_instr('*', 16, _keep_mul_high) |
| def miasm.arch.x86.sem.pmulhw = vec_vertical_instr('*', 16, lambda x: _keep_mul_high(x, signed=True)) |
| def miasm.arch.x86.sem.pmullb = vec_vertical_instr('*', 8) |
| def miasm.arch.x86.sem.pmulld = vec_vertical_instr('*', 32) |
| def miasm.arch.x86.sem.pmullq = vec_vertical_instr('*', 64) |
| def miasm.arch.x86.sem.pmullw = vec_vertical_instr('*', 16) |
| def miasm.arch.x86.sem.psubb = vec_vertical_instr('-', 8) |
| def miasm.arch.x86.sem.psubd = vec_vertical_instr('-', 32) |
| def miasm.arch.x86.sem.psubq = vec_vertical_instr('-', 64) |
| def miasm.arch.x86.sem.psubsb = vec_vertical_instr('-', 8, _saturation_sub_signed) |
| def miasm.arch.x86.sem.psubsw = vec_vertical_instr('-', 16, _saturation_sub_signed) |
| def miasm.arch.x86.sem.psubusb = vec_vertical_instr('-', 8, _saturation_sub_unsigned) |
| def miasm.arch.x86.sem.psubusw = vec_vertical_instr('-', 16, _saturation_sub_unsigned) |
| def miasm.arch.x86.sem.psubw = vec_vertical_instr('-', 16) |
| miasm.arch.x86.sem.sbuild = SemBuilder(ctx) |
| int miasm.arch.x86.sem.STMXCSR_VALUE = 0x1fa0 |
| def miasm.arch.x86.sem.subpd = vec_vertical_instr('fsub', 64) |
| def miasm.arch.x86.sem.subps = vec_vertical_instr('fsub', 32) |
| def miasm.arch.x86.sem.subsd = vec_op_clip('fsub', 64) |
| def miasm.arch.x86.sem.subss = vec_op_clip('fsub', 32) |